Update 3/8/2023: Intel has pointed out a translation error with the report from UDN — the presentation shared with the press covered the previously-announced tape-out of internal test chips for the 18A and 20A process nodes, and test chips for a large potential foundry customer have taped out, and silicon is running in the lab. The development of the nodes is not final. We've amended the text below.
Intel has completed chip tape-outs of its Intel 18A (1.8nm-class) and Intel 20A (2nm-class) fabrication processes that will be used to make the company's products, as well as chips for clients of its Intel Foundry Services (IFS) division, reports UDN.
Wang Rui, president and chairman of Intel China, said at an event that the company had finalized the development of its Intel 18A (18 angstroms-class) and Intel 20A (20 angstroms-class) fabrication processes. However, this does not mean that the production nodes are ready for commercial manufacturing, but rather that Intel is working towards finalizing the specifications, materials, requirements, and performance targets for both technologies.
Intel's 20A fabrication technology will rely on gate-all-around RibbonFET transistors and will use backside power delivery. Shrinking metal pitches, introducing all-new transistor structures and adding backside power delivery at the same time is a risky move, but it is expected that 20A will allow Intel to leapfrog the company's competitors — TSMC and Samsung Foundry. Intel plans to start using this node in the first half of 2024.
Intel's 18A manufacturing process will further refine the company's RibbonFET and PowerVia technologies, as well as shrink transistor sizes. The development of this node is apparently going so well that Intel pulled in its introduction from 2025 to the second half of 2024. Intel originally planned to use ASML's Twinscan EXE scanners with a 0.55 numerical aperture (NA) optics for at least some of the production of its 1.8 angstroms node, but because it decided to start using the technology sooner, it will rely on extensive use of existing Twinscan NXE scanners with 0.33 NA optics, as well as EUV double patterning.
The company itself expects its 1.8nm-class manufacturing technology to be the industry's most advanced node when it enters high-volume manufacturing (HVM) in the second half of 2024.
Intel's 20A and 18A fabrication technologies are being developed both for the company's own products as well as for chips that will be produced by IFS for its foundry customers.
"We have an active pipeline of engagements with seven out of the 10 largest foundry customers coupled with consistent pipeline growth to include 43 potential customers and ecosystem partner test chips," said Pat Gelsinger, chief executive of Intel, on a recent conference call with analysts and investors. "Additionally, we continue to make progress on Intel 18A, and have already shared the engineering release of PDK 0.5 (process design kit) with our lead customers and expect to have the final production release in the next few weeks."
Plus, delays are always possible...
Aye research is the "easy" part putting it into mass production is a lot harder.
That being said if they can get this to actually turn into viable production before it's outdated that would be amazing.
I suppose if you unflip flip chips so they lie fat-silicon-down using TSVs for power and substrate IO, that makes the active electronics ~0.2mm closer to 3D-stacked stuff on top and the IHS for heat dissipation.
It's not as bad as when comcast writes Mbps as MBPS or when a phone salesman straight tells you that Mbps stands for "Megabytes per second" which would be 8x faster than what they are actually selling ... but it's almost as bad. I'd still put it in the to 10 computer marketing lies. I'd say it's slightly better than Seagate confusing a judge into letting them redefine the measurement 1 GigaByte as 1 Billion Bytes, and slightly worse than Intel letting their partners pretend Optane SSDs counted as RAM. So, and about the same badness as Intel's P/E-core mismarketing nightmare.
That said I'm already getting lost on what TSMC process Intel 20A is supposed to compete against. IIRC It will go up against and probably slightly behind TSMC N4 "4nm".
If I remember right, Intel wishes they could be competitive with the following:
IntelTSMC10 nm = Intel 7"7nm "N77nm = Intel 4NFF7+ or N6Intel 3N5Intel 20AN5+ or N4Intel 18AN3
I'm no fan of Intel, but TSMC does the same thing. N5, N5+ and N4 are actually the same node size. There isn't a great way to compare the two with current metrics TBH. Density would be a better way, though still not prefect, but I doubt we will get a better apples to apples way to compare nodes anytime soon.
Wait, does that mean they are developing/manufacturing this in China? If so, isn't that a national security threat? I thought we were trying to keep the latest and greatest semiconductor tech. out of their hands for precisely that reason.
My concern about skipping 0.55 numerical aperture naturally goes to costs, but I'm sure the bean counters will have run the numbers and checked that it's both economically viable and competitive.
In the nearer term, my main concern is with voltage and frequency scaling on Intel 4, but I guess we'll find out before long.