Intel's Arrow Lake-H could feature three types of CPU cores according to Linux patch — hybrid designs could get more complex

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One type of P cores, two types of E cores.

12th Gen Alder Lake
(Image credit: Intel)

Intel's upcoming Arrow Lake-H processors for higher-end notebooks appear set to bring a new level of complexity to their hybrid core architecture. According to an Intel Linux patch noticed by Phoronix, these processors will include not only Lion Cove high-performance cores (P-cores) but also a mix of two types of efficiency cores (E-cores): the next-generation Skymont cores and the current-generation Crestmont cores.  

The Arrow Lake-H series was initially reported to consist solely of Lion Cove P-cores and Skymont E-cores, and its possible that the integration of a third core type could only apply to certain models in the Arrow Lake-H stack — it isn't unheard of for Intel to carry lower-end prior-gen processors into its newer generations of processors. 

Skymont is based on an all-new E-core microarchitecture that promises to offer substantial performance improvements over Crestmont, the E-core used in the Meteor Lake. However, the latest Linux patch could mean that Arrow Lake H will also incorporate Crestmont cores alongside Skymont, creating a heterogeneous mix of E-cores. This would be a significant shift from previous Intel designs, which typically used a single type of E-core. 

This combination of two different E-core microarchitectures within a single processor lineup is a first for Intel, though the approach is not completely unheard of. Although Intel hybrid platforms have only featured one type of E-core, there is a major catch. Intel's Core Ultra 'Meteor Lake' processors feature two low-power LP Crestment E-cores integrated into the SoC tile and six fully-fledged Crestmont E-cores in the compute tile. 

Arrow Lake's compute tile is an Intel 20A-based design with gate-all-around RibbonFET transistors and PowerVia backside power delivery. Re-architecting previous-generation Crestmont cores for GAA transistors makes little sense.

The inclusion of both Skymont and Crestmont cores in the Arrow Lake-H family suggests that Intel is exploring new ways to optimize performance and power efficiency, but it is also going to introduce additional complexity for system management and software support. To manage this complexity, new Linux patches have been developed. 

"ArrowLake-H is a specific variant of regular ArrowLake," Intel's description of the patch reads. "It shares same PMU features on lioncove P-cores and skymont E-cores with regular ArrowLake except ArrowLake-H adds extra crestmont uarch E-cores. Thus ArrowLake-H contains two different atom uarchs. This is totally different with previous Intel hybrid platforms which contains only one kind of atom uarchs. In this case, it's not enough to distinguish the uarchs just by core type." 

These patches are designed to distinguish between the two types of E-cores within Arrow Lake-H processors, using a unique identifier for each core architecture, which allows the operating system to properly allocate tasks to the appropriate cores based on their capabilities. While the patches give us an idea about two different energy-efficient microarchitectures in Arrow Lake-H, they do not disclose whether Crestmont cores are physically located inside the compute tile or somewhere else.

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Anton Shilov
Anton Shilov
Contributing Writer

Anton Shilov is a contributing writer at Tom’s Hardware. Over the past couple of decades, he has covered everything from CPUs and GPUs to supercomputers and from modern process technologies and latest fab tools to high-tech industry trends.

3 Comments Comment from the forums
  • TheSecondPower
    When I first learned how Meteor Lake's tile design worked, I realized Arrow Lake could be like this. And earlier this year Intel had slides depicting drawings of Meteor Lake, Lunar Lake, and Arrow Lake showing that Lunar Lake would come before Arrow Lake and Lunar Lake would have a new tile architecture. But the drawings depicted the tiles, and Arrow Lake's drawing looked exactly like Meteor Lake's.

    This makes a lot of sense. Tiles are expensive. But if they allow Intel to spend fewer resources on new dies, then they can be a little cheaper. AMD did this on desktop when they reused the IO die from Zen 2 for Zen 3 and the IO die form Zen 4 for Zen 5. Evidently Intel is doing the same thing.

    AMD's chiplets have high idle power consumption because all CPU activity has to communicate between 2 dies, so AMD has never used this concept for its mobile-first chips. But Meteor Lake's chips are mobile-first, so to get around this issue Intel put cores into the IO tile, so for light work the CPU tile can be turned off. As it stands, the Crestmont LPE cores on the IO tile are a bit slower than the E cores on the CPU tile and they can't communicate with the P cores as quickly, so Intel already has 3 types of cores in Meteor Lake, and that really won't change for Arrow Lake-H.

    I am a little disappointed though. The LPE Crestmont cores are pretty slow and because the CPU tile can be turned off if only the LPE cores are used, workloads the user is waiting on sometimes run on them, where usually only background tasks run on the E cores. This means that in some tasks Arrow Lake won't be any faster. But on the other hand, it'll overall be an upgrade over Meteor Lake. And AMD always seems to be building economical processors Meteor Lake felt like Intel was just throwing money at all their problems, where now this news makes it seems like Intel has a plan to build the latest things but still make them economically feasible.
    Reply
  • TheSecondPower
    Taking in this and some rumors and some things we know, I can speculate what will happen:
    Arrow Lake-U (the successor to Meteor Lake's 2+8 tile die) doesn't exist. Lunar Lake will eat into its sales so it wouldn't make sense to pay to develop it. Instead Meteor Lake-U can be moved to Intel 3 for a nice performance and efficiency boost with a lower manufacturing cost. As it stands, Intel has "Core 100" Raptor Lake parts and "Core Ultra 100" Meteor Lake parts, so these can be "Core 200" parts. If someone wants "Core Ultra 200" in this power level, shop for Lunar Lake.
    Arrow Lake-H is as described in the article. I also think its CPU tile will be built on the Intel 20A node and all the other tiles will carry over from Meteor Lake. Meteor Lake-H debuted Intel 4, so it makes sense for Arrow Lake-H to debut its successor. Like Intel 4, Intel 20A won't be able to meet demand, so it'll go into "Core Ultra 200" products and Meteor Lake-H will get a production-boosting move to Intel 3 and be called "Core 200".
    Arrow Lake-S on desktop won't need LPE cores so its IO tile won't have them. Intel 20A won't be able to reach desktop clock speeds so these will have a CPU tile built on Intel 3, but with Lion Cove and Skymont cores. Desktops can afford the extra power these will need on Intel 3, but they'll still use less power than Raptor Lake on Intel 7. There is no appropriate older generation to rebrand here so all Core 200 desktop parts will be "Core Ultra" chips with Lion Cove and Skymont cores.
    No Arrow Lake chips will have Xe2 graphics. I think Xe2 has only been designed for a TSMC N3 node and Lunar Lake and Battlemage will already use all the N3 dies Intel can buy this year. This is really what will distinguish Lunar Lake from Arrow Lake.
    Reply
  • bit_user
    TheSecondPower said:
    I am a little disappointed though. The LPE Crestmont cores are pretty slow ...
    Another big disadvantage of them is that they lack the ISA extensions in the newer Skymont and Lions Cove cores. Due to that, Intel has disabled those new instructions in all of the cores, in those CPUs. From what I recall, it's not as big a loss as that of AVX-512, but it's still annoying to have those two gimped LP E-cores holding back the others, just for the sake of ISA symmetry. That said, I do understand and largely agree with the argument for ISA symmetry.
    Reply