HyperTransport: A High-Speed Bus Without Detours
Instead of the usual parallel FSB, the CPU communicates via a HyperTransport interface. The serial interface with a variable bitrate allows the SledgeHammer to attain a data transfer rate of 3.2 GB/s - in both directions simultaneously. This results in a total bandwidth of 6.4 GB/s per Hypertransport port. By comparison, the Pentium 4 with 533 MHz FSB allows a maximum data throughput of 3.97 GB/s - but not in both directions simultaneously.
The bandwidth of the serial interface is designed to be flexible. AMD gives the server version of the Opteron three HyperTransport ports. The entire data traffic of the Opteron processor runs through the HyperTransport interface and the integrated memory controller. In order to let the neighboring CPU gain direct access to its system memory, the Opteron uses the XBAR switch. For commands and addresses, the XBAR switch has further 64 bit buses available.
Five Different Modes Of Operation
The five different modes of the AMD Opteron.
Depending which bits are set in the LME register, the processor works in one of the operation modes depicted here. This ensures backwards compatibility, which is one of the biggest advantages of AMD's 'AMD64' architecture over Intel's 'IA64'.
A Big Deal - Opteron's 64 Bit Registers
A significant new feature: the extended 64 bit register.
Opteron can handle up to 1 TB (1024 GB) of system memory, which in detail means that it comes with a 40 bit wide physical address space and a 48 bit wide virtual address space. This may sound significantly less than the 64 bit one might expect, but it offers a lot larger main memory than the 32 bit wide address space of Pentium 4, Xeon or AthlonXP. The AMD64 architecture extends the 32 bit register of the IA-32 processors to 64 bit. With applications that run in legacy or compatibility modes, the Opteron can continue to use only the eight conventional 32 bit wide registers EAX, EBX, ECX, EDX, EBP, ESI, EDI and ESP (see the graphic above).
If the processor works in 64 bit mode, then the x86-64 architecture extends these eight registers via the R-prefix to 64 bit. The extended registers are then named RAX to RSP. In addition, in 64 bit mode, the Opteron can access another eight GPRs (General Purpose Registers) R8 to R15, which are also 64 bit wide each. For floating point calculations, the eight 128 bit wide SSE registers have been doubled with XMM8 to XMM15. Once again, only the 64 bit mode profits from this.
