Image source: PCI-SIG PCI-X 2.0 Presentation.

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As we discussed before, the total bandwidth of up to 4.26 GB/s is always shared by all devices that are connected to the bus. In addition, any device that is not capable of running at high clock speeds will cause the whole system to reduce the bus speed to the lowest common multiple, which can be as slow as 33 MHz. This might be considered the price you pay for compatibility, but can be prevented by deploying more than one PCI-X bridge on a motherboard. Products employing this feature are being offered by all manufacturers of professional class products, including companies such as Asus, Supermicro and Tyan.

The backwards compatibility issue is a big point in favor of PCI-X. Administrators need to be absolutely sure the hardware they deploy will work properly, which is why there is a rather slow adoption of new technology in the server/workstation area. Why should folks say goodbye to a proven technology that remains backwards compatible, offers sufficient performance and benefits from a large hardware base? This likely won't change very much in the near future, since the PCI-SIG is working on a PCI-X 1066 standard. This would double the bandwidth once again, and add features such as on-the-fly data compression, auto fail-over and redundant path mechanisms. It may also incorporate support for isochronous transfers, but remove support for conventional PCI.

Image source: PCI-SIG PCI-X 2.0 Presentation. The only way to provide multiple high bandwidth PCI-X slots is by deploying multiple PCI-X bridge components onto a motherboard.