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Micron, Samsung Launch Consortium for HMC Tech

Thursday Micron and Samsung launched the Hybrid Memory Cube Consortium (HMCC) which will bring together OEMs, enablers and integrators committed to delivering the promise of Hybrid Memory Cube (HMC). The consortium will initially define a specification to enable a range of applications including networking, storage and high-performance computing.

As previously reported, Micron created an entirely new category of memory by combining fast logic process technology and advanced DRAM designs. The end result, called Hybrid Memory Cube, is a high bandwidth, low energy, high-density memory system. Micron claims that a single HMC can provide more than 15x the performance of a DDR3 module, and is dramatically more efficient than current memory, using 70-percent less energy per bit than DDR3. HMC’s stacked architecture also uses nearly 90-percent less space than today’s RDIMMs.

"One of the primary challenges facing the industry — and a key motivation for forming the HMCC — is that the memory bandwidth required by high-performance computers and next-generation networking equipment has increased beyond what conventional memory architectures can provide," Samsung and Micron explains. "The term 'memory wall' has been used to describe the problem. Breaking through the memory wall requires a new architecture that can provide increased density and bandwidth at significantly reduced power consumption."

Micron and Samsung will serve as the founding members of the new consortium, and will work closely with fellow developers Altera Corporation, Open Silicon, Inc., and Xilinx, Inc. to collectively accelerate industry efforts in bringing to market a broad set of technologies. "By defining an industry interface specification for developers, manufacturers and architects, the consortium is committed to making HMC a successful new high-performance memory technology," they added.

Although the HMCC’s memory specifications will be co-developed among the consortium members, the consortium itself is open to an unlimited number of adopters. Members will have the opportunity to receive early access to draft specifications and participate in specification discussions and development, Micron and Samsung said.

OEMs, enablers and integrators interested in additional information, technical specifications, tools and support for adopting the technology can head over to the Hybrid Memory Cube website for more details.

  • saturnus
    Very cool. And it's about time something is seriously done to penetrate the very imminent performance limitation of current memory technology. For even though there are still an available roadmap toward DDR5 (DDR4 will probably just as in graphics be leaped) and XDR2, the limits of these technologies seem to peak out at about 4x current DDR3 performance. So if HMC starts out at 15x the current DDR3 performance, and a likely HMC2 upgrade later on the memory roadmap is secured for the next 4-5 years. After that, who knows, probably memristor technology.
  • Cazalan
    I see this more for the high end server computing. Mainstream desktop computing will start integrating the main memory inside the CPU as a Level 4 cache. This is already done in the cell phone and tablet market, where ARM CPUs have 512MB/1GB of memory embedded with the CPU/GPU. A Trinity APU + 4GB embedded DRAM would satisfy a great majority of the market. You get huge power savings by not having to go off chip for memory.
  • dark_lord69
    If it's that much faster than DDR3 then it might make a great replacement for current DDR5 RAM being used on video cards.
  • ko888
    Hopefully Rambus isn't involved in this in any way.
  • Parsian
    Rambus lawsuit in 1,2,...
  • eddieroolz
    Hey, that cube looks cool. Can I have one?