AMD Ryzen 5 5600G Smiles for the Camera

Fritzchens Fritz, a person known for taking some impressive silicon die shots, has today published his latest creation: AMD Ryzen 5 5600G APU die shots. In the latest photos, Cezanne smiles for the camera and gives us some interesting discoveries.

AMD Ryzen 5 5600G APU is AMD's latest chip based on Zen 3 processor cores and Vega integrated graphics. The APU comes equipped with six cores and twelve threads, running at 3.9 GHz base frequency and 4.4 GHz boost speeds. Carrying seven GPU cores based on Vega architecture, running at 1900 MHz, the APU performs well for basic needs. You can check out our review here.

The size analysis has been performed by Locuza, a person who usually analyzes these die shots and shares the details on social media. By performing some basic measurements, we can conclude that the size of Zen 3 is much greater than Zen 2, mostly due to the compute area. This region is 27% greater than Zen 3, explaining the IPC uplift that the new core architecture is providing.

(Image credit: Locuza)

According to the notes from Locuza, AMD could have added more GPU cores to the SoC, however, power constraints have limited this chip's ability to carry more Radeon Vega cores in its package. As you can see, the majority of 10.7 billion 7 nm transistors are used for computational purposes, like Zen 3 and GCN5 Vega units, while the rest is used for IO and memory.

  • taz-nz
    Pity it's such a cut and paste of Renoir, would have been nice if they used white space created by taller CPU cores to add more GPU Compute Units, there is room for 3 maybe 4 more CU under the existing 8 CUs, a high clock Vega 11 or Vega 12 would have been nice iGPU performance boost for desktop models and could have been fused off on laptop models to meet power budgets.
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  • Kamen Rider Blade
    Or it's room to create new Die Variations.

    Some with BIG.little CPU configs to combat Intel.

    Some with extra CU's for more GPU oomph.

    Some with more dedicated ASIC logic for a specific work load.

    Add in a tiny FPGA unit as a variant.
    Reply