China Ramps Multi-Chiplet Efforts with Industry Heavyweights

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The chief executive of SMIC faced criticism for proposing to advance chip packaging technologies and multi-chiplet designs after the company lost access to 7nm and 10nm-capable wafer fab tools due to U.S. sanctions. But his vision has now become central to China's semiconductor approach for 2023, according to DigiTimes. Industry heavyweights like Huawei and government-backed entities with deep pockets are making substantial progress in this domain. Companies like JCET and Tongfu already offer their clients 2.5D and 3D packaging technologies.

Through the National Natural Science Foundation of China (NSFC), the Chinese government is channeling more funds into chiplet research. NSFC's 2023 research areas encompass advanced 2.5D/3D packaging techniques, reusable chiplet design methods, parallel processing for multiple chiplets, electronic design automation (EDA) tools, and comprehensive multi-chiplet simulations. This intensified focus on chiplet technology showcases China's strategy to minimize its dependence on foreign semiconductor innovations. 

Large companies are also making strides in chiplet design, packaging, and multi-chiplet technologies. For example, Huawei ramped up chiplet-related patent filings from 30 in 2017 to over 900 in 2022. China-based companies recently formed the China Chiplet League to advance the homegrown Chiplet Interconnect Interface Standard.

Chinese companies are by no means novices in advanced packaging. Yet, for now, most of their efforts are tailored to cater to demand from non-Chinese companies with access to Taiwan-based TSMC and ASE Technology Group, the world's largest outsourced semiconductor assembly and test (OSAT) company.

JCET, the world's third-largest OSAT, is involved in the chiplet sector. The company can package chiplets made on a 4nm-class process technology, which is nearly on par with what TSMC can offer and is good enough to cater to domestic and international clientele. 

Tongfu, another top OSAT, also has developed a set of 2.5D, 3D, and advanced chiplet packaging technologies. Tongfu reportedly indicated that it anticipates continuing benefits from AMD's broad adoption of chiplet technology in the future. This suggests Tongfu has aligned its technological advancements with industry trends and foresees potential collaborations or synergies with major players like AMD. 

NationalChip is collaborating on high-performance interconnect IP designs for chiplet applications. The company is also researching advanced chip design, including high-bandwidth memory (HBM) technology, with a primary focus on creating tailored products for customers. 

As for VeriSilicon, it has multiple verification tools for multi-chiplet designs that are reportedly used by companies serving the high-performance computing (HPC) sector. 

Anton Shilov
Freelance News Writer

Anton Shilov is a Freelance News Writer at Tom’s Hardware US. Over the past couple of decades, he has covered everything from CPUs and GPUs to supercomputers and from modern process technologies and latest fab tools to high-tech industry trends.

  • usertests
    Going deep into 3D chips could bypass the advanced node problem. Temporarily, anyway.
  • gg83
    one hundred chiplets on 28nm = how many chiplets on 3nm? per mm(2) to performance. I wonder, what if they used an entire 300mm wafer full of chiplets if that would help?