Several Tiger Lake Y (TGL-Y) and Tiger Lake U (TGL-U) entries have started to appeared in the Geekbench 4 and SiSoftware databases. Tiger Lake is slated to debut next year to succeed Ice Lake (ICL).
Starting with the Geekbench 4 submission, the Tiger Lake Y sample checked in with a quad-core (opens in new tab), eight-thread (opens in new tab)configuration and a 1.19 GHz base clock (opens in new tab). This chip appears to be identical to the one that was spotted back in July (opens in new tab). This time, however, we have more information on the cache (opens in new tab)configuration.
According to Geekbench 4's listing, the quad-core Tiger Lake Y chip in question has 1.25MB of L2 cache per core and up to 12MB of L3 cache, which should equate to 3MB per core. In comparison, Ice Lake features 512KB of L1I cache and 2MB of L3 cache per core. However, Tiger Lake Y's L1D and L1 cache design seems to remain unchanged. The sample shows 48KB of L1D cache and 32KB of L1I cache per core, the same as Ice Lake.
It's already known that Tiger Lake processors will employ Intel's Gen12 (Generation 12) graphics processing unit. The latest SiSoftware submissions give us a sneak peek of what we may be able to expect from Gen12 in terms of specifications.
The submissions both point to Gen12 sporting up to 96 Execution Units (EUs), which adds up to 768 shading units. As you may recall, Gen11 maxes out at 64 EUs so, we're looking at a 50% increase.
The iGPU (integrated GPU) inside Tiger Lake Y appears to operate at 1.1 GHz, with the Tiger Lake U's iGPU working at 1 GHz. This isn't surprising, as Intel's Y-series is confined to a lower TDP (thermal design power) than the U-series and doesn't have as much room to breathe.
In other news, Linux publication Phoronix (opens in new tab)today uncovered Intel's latest update to add 16-bit atomic operation support for its Tiger Lake processors. It's safe to assume that Intel is working diligently on Tiger Lake for a 2020 release.