Toshiba TSV Technology Increases NAND Flash Efficiency

Earlier this month, Toshiba announced a new technology used in conjunction with stacking components in a package, Through Silicon Via (TSV). The press release focused heavily on stacking up to 16 NAND flash die, something we've already seen in retail SSDs from Samsung. The new method releases the die from wire bonding and ports channels through the silicon to transfer data and provide power. 

TSV is not new to Toshiba. We found documents dating back to 2007 on the company's website and even some detailed information on the stack. When it comes to SSDs, companies stack die in packages that we often look at and call NAND flash. Most products use four to eight die per package, but some take the stack all the way up to 16 die.

Companies don't like to push stacks to the upper levels for a few reasons. The first has to do with failures. If something goes wrong in the packaging process, then the entire stack is destroyed, an expensive mistake considering NAND flash is the most expensive component in an SSD. The second issue revolves around impedance. The longer the wire bond, the more resistance encountered. The bottom die use shorter bonding wires back to the BGA or TSOP pads, but the die at the top have higher resistance, and in some cases the flash has to clock down to lower speeds to keep signal integrity. Because controllers can't compensate for the lower speeds needed at the top, the entire die stack has to run at a lower speed. 

TSV technology removed the wire bonding from the edges of the die. Instead, the signal is passed through the entire stack vertically. Vertical NAND, often referred to as V-NAND or 3D NAND, differs from TSV, though. Nothing leads us to believe that the two technologies can't work together, but at this time we are unaware of any designs that merge the two technologies.

As previously mentioned, the new product was just announced less than 10 days ago, but it appears that partners have been playing with TSV flash for some time now. PMC Sierra had a working demo at FMS 2015. Stephen Bates walked us through many of the details with an enthusiastic tone.

Toshiba's partners are excited about this product for two reasons: The first is performance. PMC Sierra makes very high-performing NVMe SSDs that move the bottleneck from the PCIe interface to the flash itself. The Princeton controller uses 32 channels to address a large number of flash die and is a very expensive controller to manufacture. If the company is able to reach the same performance level with just 16 channels, the overall cost will drop. The capacity can remain the same because TSV allows Toshiba to stack twice the number of die in each package.

Performance is only one aspect of the overall datacenter equation, though. The upfront costs are minimal compared to the long term costs due to power consumption. PMC Sierra demonstrated a very wide gap in power efficiency between non-TSV Toggle mode flash and new TSV Toggle mode flash.

What is great for the datacenter today will eventually trickle down to client products. Improving power efficiency at the SSD level always increases notebook battery life when away from a charging location. Less power drain also affects a normally overlooked factor, which is notebook battery endurance. When you discharge a notebook battery, it wears the power cells. Less cycles, especially very low states to fully charged, increases the actual battery life. TSV is just another piece in the notebook puzzle that is consistently changing to improve the user experience and in making a more robust product.

At this time we are not sure when we will see NAND flash with TSV technology, but we suspect Toshiba's 3D BiCS flash could come to market in 2016 with more vertical features than we previously expected.

Chris Ramseyer is a Contributing Editor for Tom's Hardware, covering Storage. Follow him on Twitter and Facebook. Follow Tom's Hardware on Twitter, Facebook and Google+.