The QTCore-C1 chip, created by NYU Tandon’s Dr Hammond Pearce using ChatGPT, has passed another major milestone. NYU wrote to Tom’s Hardware today to alert us that the QTCore-C1 has been successfully fabricated, and we have embedded a video showing it powering a festive Christmas light show. Moreover, it is asserted that the power of contemporary AIs is now sufficient to “blow open access to successful chip design.”
Ahead of the above Christmas lights extravaganza video shared by Dr Pearce, a development PCB featuring the QTCore-C1 chip was pictured operating and connected to a display. The LinkedIn post reminds us that the project won the inaugural Efabless Corporation AI-generated open-source silicon design contest earlier this year. We wrote about this AI design feat back in June.
The Efabless Challenge blog indicates the QTCore-C1 chip design was created “entirely via conversations with OpenAI’s GPT-4, [and] every component and every signal was created with GPT-4’s authorship.” Interestingly, the AI was so capable that it also helped patch bugs found in testing and provided insights into the instruction set architecture (ISA) design.
It is noteworthy that ChatGPT didn’t design the CPU in its entirety. Yes, NYU researchers used ChatGPT to translate the ‘plain English’ that describes a chip and its capabilities to a Hardware Descriptor Language (HDL) such as Verilog. However, there are several other key steps to CPU design, and the QTCore-C1 chip is a mere functional block in a more complex overall design.
The QTCore-C1 integrated circuit (IC) that has been successfully taped out, fabricated, and demonstrated running is probably more accurately described as a co-processor. Dr Pearce explains it is “an 8-bit accumulator-based architecture which can act as a kind of predictable co-processor for the main Caravel core.” Thus, its scope has limits, and those are that “It can do basic mathematical and logic operations, interact with several input/output lines as well as measure time with an internal counter, and can send and receive values and interrupt requests to the main processor.”
Efabless has more than a passing interest in AI-powered chip design and its potential to ‘blow open’ the market. As a creator platform for ASICs offering custom design and manufacturing facilities, the more people get into custom silicon, the better (starting from $9,750 per project).
