Intel Panther Lake samples with flagship 18A node have been powered on at eight customers — Co-CEOs dispel rumors regarding poor silicon health

Intel
(Image credit: Intel)

Just a few months after Pat Gelsinger presented Panther Lake Engineering Samples live at the Lenovo Tech World event, Intel reports that Panther Lake has now achieved power-on status at eight customers. During the Barclays 22nd Annual Global Technology Conference, the two interim co-CEOs at Intel dispelled rumors regarding 18A and the scheduled Panther Lake for launch in 2025.

Panther Lake, dubbed Core Ultra 300, is expected to be the successor to Intel's Arrow Lake-U/H family of CPUs, the latter of which is rumored to launch next month. These CPUs will be the first to be built using Intel's flagship 18A process as Intel looks to break free from TSMC. Over 70% of Panther Lake will be manufactured in-house. From what we can gather, Panther Lake is a mobile-first product.

Michelle Johnston Holthaus and David Zinsner, co-CEOs at Intel, confirmed that Panther Lake is in the hands of eight customers who've successfully achieved power-on status with ES0 silicon - likely the first Engineering Samples. Intel's turnaround hinges on 18A - powering Clearwater Forest and Panther Lake - so much so that ex-CEO Pat Gelsinger had to step in at X to set the record straight. While Intel didn't explicitly mention yields or newer defect density measures, this is still a positive development, given the recent corporate fiasco and all the FUD surrounding the firm.

"Now we are using Intel Foundry for Panther Lake, which is our 2025 product, which will land on 18A. But just to give some assurances, on Panther Lake, we have our ES0 samples out with customers. We have eight customers that have powered on, which gives you just kind of an idea that the health of the silicon is good and the health of the Foundry is good."

Intel

Panther Lake is rumored to reintegrate the memory controller back into the Compute Tile to ward off latency issues similar to Arrow Lake. The latency issue is actually due to several reasons but largely stems from an outdated SoC Tile and an off-die design.

With upwards of 16 cores, Panther Lake isn't a successor to Lunar Lake but rather Arrow Lake. Architecturally speaking, we expect Intel to use Cougar Cove P-cores and Skymont/Darkmont E-cores. With Lunar Lake already in the lead, Panther Lake might officially dethrone AMD in the graphics department - set to feature up to 12 Xe3 (Celestial) iGPU (Integrated GPU) cores.

2025 will be a make-it or break-it year for Intel, and ultimately, if the company wants to transition away from TSMC for leading-edge nodes, all of its offerings hinge on 18A's success. Like Lunar Lake, Intel might reveal Panther Lake at Computex next year, but a late 2025 launch is also on the cards.

Hassam Nasir
Contributing Writer

Hassam Nasir is a die-hard hardware enthusiast with years of experience as a tech editor and writer, focusing on detailed CPU comparisons and general hardware news. When he’s not working, you’ll find him bending tubes for his ever-evolving custom water-loop gaming rig or benchmarking the latest CPUs and GPUs just for fun.

  • Gururu
    A lot of the disinformation I am sure coming out of foreign competitors, who'd love it if the U.S. failed hard at our fabs.
    Reply
  • JRStern
    Better than nothing.
    Still a possibility it will win, and 18a will at least equal anything from TSM.
    But, ongoing yield and cost issues will continue to haunt everyone.
    Reply
  • TheSecondPower
    What's the usual time between OEMs getting engineering samples and laptops reaching the market? Like 6-9 months or something?
    Reply
  • thestryker
    PTL/CWF are both very important from a product and foundry standpoint. PTL should bring Intel's margins back in line with where they expect to be while also being a client showcase for 18A. CWF while not as important on the margin side (all Xeons are built on Intel nodes) it will be extremely important for the enterprise market in scale and performance. From a foundry perspective I don't think this will end up being much different size wise than PTL since all available information indicates 24 core tiles.
    TheSecondPower said:
    What's the usual time between OEMs getting engineering samples and laptops reaching the market? Like 6-9 months or something?
    That sounds about right, but in this case I'd assume we're talking mid-late fall releases at the earliest since ARL laptops won't launch until next year. While I'm sure the OEMs and Intel would both like to have best foot forward they also want to be able to sell existing stock.

    I do think that the ARL laptop chips will probably be the least produced of recent history due to PTL seemingly being on track and the cost of TSMC N3 manufacturing.
    Reply
  • Mama Changa
    TheSecondPower said:
    What's the usual time between OEMs getting engineering samples and laptops reaching the market? Like 6-9 months or something?
    Panther Lake is due for release in H2 2025, but probably late Q3 if things go to plan. Also, let's not forget their server cpu Clearwater Forest is also built on 18A and due next year.
    Reply
  • DaveLTX
    Gururu said:
    A lot of the disinformation I am sure coming out of foreign competitors, who'd love it if the U.S. failed hard at our fabs.
    Disinformation? You mean reality?
    Intel 20A was supposed to be the first customer node and they dropped it. Doesn't instill confidence that we know that all intel really can do is for themselves... And why ARL went to N3?
    Reply
  • thestryker
    DaveLTX said:
    Disinformation? You mean reality?
    There's zero evidence supporting the claims against 18A being "reality". Most of the reporting has been dishonest at best. While I don't think there's some grand conspiracy it's very likely that at least some of it is being done by investors trying to maximize short term profits.
    DaveLTX said:
    Intel 20A was supposed to be the first customer node and they dropped it.
    This was supposed to be a one and done node which means their reasoning for dropping it is believable, especially after Intel 4. However until 18A appears nobody will know whether or not this was the real reason. That's the only reality of the situation: Intel has stated their reason, but that's the only actual information available.
    DaveLTX said:
    And why ARL went to N3?
    It was supposed to be on 20A, but the node was canceled and LNL was already on N3. In theory this makes doing ARL on N3 faster than making it work on Intel 3 and frees up EUV capacity in the process. Assuming 18A is actually hitting its timelines this is the most logical approach for the long term health of IFS.
    Reply
  • SunMaster
    Gururu said:
    A lot of the disinformation I am sure coming out of foreign competitors, who'd love it if the U.S. failed hard at our fabs.

    Oh, is it a competition where Intel is synonomous with 'US"? And 'our" fabs are manufacturing using a national secret, I presume,
    Reply
  • kjfatl
    TheSecondPower said:
    What's the usual time between OEMs getting engineering samples and laptops reaching the market? Like 6-9 months or something?
    6-9 months for a new part of this complexity on a new process seems like an aggressive schedule. If everything goes right it is reasonable, but I would expect evaluation phases and 2 or 3 loops through the fab to fix bugs and make changes to optimize process yields. This puts it at 9 to 15 months. First parts came off of the fab over a month ago.
    Reply
  • phead128
    Gururu said:
    A lot of the disinformation I am sure coming out of foreign competitors, who'd love it if the U.S. failed hard at our fabs.
    Engineering samples powering on doesn't imply anything about yield at HVM scale though.

    Pat Gelsinger famously handed an 18A engineering sample to Lenovo CEO, then he got fired. So what does that say about 18A health with just passing out initial samples to customers?

    https://encrypted-tbn0.gstatic.com/images?q=tbn:ANd9GcT7UiXt58l3a-7EpNZHRyJhWfq55syZ6uI7cA&usqp=CAUPat shows engineering sample of 18A to Lenovo just four weeks before he got fired.

    TLDR: engineering samples does not imply healthy HVM yields at scale.
    Reply