G.Skill Introduces Royal Elite Memory With Ultra-Low Timings

Trident Z Royal Elite 3600-4000MHz CL14
(Image credit: G.Skill)
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Aaron Klotz
Contributing Writer

Aaron Klotz is a contributing writer for Tom’s Hardware, covering news related to computer hardware such as CPUs, and graphics cards.

  • SpecialK27
    Their ripjaws line was already ultra tight with 3600MHz and CL14 and pretty solid.
    This is only new as far as the 4000MHz with CL14 is concerned.
    Reply
  • helper800
    SpecialK27 said:
    Their ripjaws line was already ultra tight with 3600MHz and CL14 and pretty solid.
    This is only new as far as the 4000MHz with CL14 is concerned.
    I am pretty sure that their 3600 kit is also even tighter. Their previous kit with the tightest timings at 3600 was 14-15-15-35. I personally bought one of those kits and further tuned it to 14-15-14-30 with many of the sub timings substantially lower as well. G Skill makes some great kits.
    Reply
  • Dantte
    SpecialK27 said:
    Their ripjaws line was already ultra tight with 3600MHz and CL14 and pretty solid.
    This is only new as far as the 4000MHz with CL14 is concerned.
    Technically this is the same Trident kit they have always had, it just sports a new XMP profile that bumps the voltage to 1.55V so it can handle the higher frequency and timings. If you have the Trident Royal kit already, raise the voltage and see what you can do with it, I bet you wont see a difference.

    So, what do you get for the extra $$$, a new XMP profile and warranty to run you memory at this high of a voltage! Same chips, same package, same everything else.
    Reply
  • Regal68
    Y'all need to stop spreading this bs that low cache latency is optimal or even noticeable. Unless you're unlucky enough to be still on Intel, Ryzen's massive cache makes low CL RAM irrelevant.
    Reply
  • helper800
    Regal68 said:
    Y'all need to stop spreading this bs that low cache latency is optimal or even noticeable. Unless you're unlucky enough to be still on Intel, Ryzen's massive cache makes low CL RAM irrelevant.
    Lower latency RAM directly contributes to more performance in many if not all use cases. Where are you sourcing this information?
    Reply