AMD's Upcoming Socket AM5 for Raphael Processors to Lack PCIe 5.0 Support

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PCIe 4.0 is still okay though

AMD Zen 4 CPU
(Image credit: ExecutableFix/Twitter)

AMD was the first company to support the PCIe 4.0 protocol in its processors and accompanying motherboards. However, according to the latest information coming from the recent Gigabyte hack that already produced a plethora of new information, AMD will not bring support for PCIe 5.0 to its forthcoming socket AM5 motherboards, at least not initially. 

According to TechPowerUp, which got ahold of Gigabyte's leaked documents, AMD decided to stay off the PCIe 5.0 wave with its upcoming AM5 CPU socket designed for its codenamed 'Raphael' processors.

The diagram below shows that AMD has given socket AM5 as many as 28 PCIe lanes. And those lanes run the PCIe 4.0 version protocol, which is the standard protocol today. Out of 28 lanes, 16 are devoted to the PCI express slot for graphics expansion, four for an M.2 SSD, four lanes for SATA expansion, and the remaining four for chipset communication with the socket.  

AMD Socket AM5 Diagram

(Image credit: TechPowerUp)

The surprising bit is that AMD is falling behind Intel in the interconnect space. At yesterday's Intel architecture day, the company revealed that the upcoming Alder Lake series of processors will deliver PCIe 5.0 connectivity. Expected to be a competing product with AMD's Raphael, it will certainly boast a newer communication standard for higher-speed communication between PCIe devices.

That, of course, doesn't mean that Intel will force its OEMs to integrate PCIe 5.0 standard. Just because the chip is capable of supporting PCIe 5.0, doesn't mean that the motherboard is as well. The newer Gen5 protocol will require thicker boards for better wiring and more retimers/redrivers in order to carry the speed, so it is possible that the Gen5 protocol will be reserved for some higher-end products like the Z-level chipsets from Intel.

It is an interesting time to see how AMD and Intel play out the whole situation, and it will be interesting to learn why AMD opted to only support PCIe 4.0. The EPYC Genoa lineup does support the Gen5 standard, so it's curious that it appears to be segregating PC and enterprise users with I/O connectivity options. We can expect to hear more about it once AMD Raphael processors launch.

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Aleksandar Kostovic
29 Comments Comment from the forums
  • Alex/AT
    We don't yet have anything to fully utilize PCIe 4.0 on desktops at scale, why bother with 5.0.
    Reply
  • Spectre4444
    so Intel says "we are going to have new chip that is bigger, stronger and faster" EXCEPT -- It is not available yet in any form, uses a new architecture that requires a Global Partner level non-trivial unproven changes to take effect. and even if it did, as was pointed out we currently don't use all of PCIe 4.0. - basically anything to cause a rollout delay ! I for one will be very happy to work with a new AMD based computer, even at the expense of PCIe 5.0 if for no other reason than "it" will actually exist in the near future.
    Reply
  • Alvar "Miles" Udell
    The problem with lacking PCIe 5 is that it's not as "future proof" as it could be, plus the doubled bandwidth would give manufacturers the ability to incorporate more M.2 slots while being able to retain x8 electrical on the slots.
    Reply
  • Kamen Rider Blade
    I think the connection between the CPU and the AM5 Chipset should've been bumped up to PCIe 5.0, then you have more bandwidth to be able to run more of your connected peripherals simultaneously.

    Other than that, PCIe 5.0 isn't going to be utilitized properly during this generation or anywhere in the near future.

    Graphics cards aren't going to saturate it.

    Only the Top End Storage might potentially saturate it.

    But that's reserved for the absolutely best NVMe drives only, most consumers can't afford it.
    Reply
  • ddcservices
    Alvar Miles Udell said:
    The problem with lacking PCIe 5 is that it's not as "future proof" as it could be, plus the doubled bandwidth would give manufacturers the ability to incorporate more M.2 slots while being able to retain x8 electrical on the slots.
    There are two sides to this, what can the socket provide, and what can the CPU provide. When the move to PCIe 4.0 hit, motherboard prices jumped by $200 for that extra support, and a LOT of people complained about it. There is a fair amount going on that puts into question the exact standards that the socket and processors will support. AMD uses that I/O die, so could release different versions based on the CPU sold. CPU-only without graphics may offer more PCIe lanes for example.

    AMD is also the type to release different specs to different companies early on to identify the source of leaks. Picture one set of specs given to one company and another to another company. Any leaks would identify which company the leak came from. Since AMD has not given ANY timeline for new products at this point, we may be seeing some AMD strategy here as well...set Intel and NVIDIA up to put out official specs for new products, wait for them, and then release and adjust its own offerings.
    Reply
  • ddcservices
    Kamen Rider Blade said:
    I think the connection between the CPU and the AM5 Chipset should've been bumped up to PCIe 5.0, then you have more bandwidth to be able to run more of your connected peripherals simultaneously.
    AMD used Infinity Fabric, not PCIe for that interconnect. If anything, AMD is really gearing up to just have PCIe hang off an Infinity Architecture system design where there is a system fabric that everything links into. Look into the Gen-Z Consortium for more information on this approach.
    Reply
  • Kamen Rider Blade
    ddcservices said:
    AMD used Infinity Fabric, not PCIe for that interconnect. If anything, AMD is really gearing up to just have PCIe hang off an Infinity Architecture system design where there is a system fabric that everything links into. Look into the Gen-Z Consortium for more information on this approach.
    That may be true on the Enterprise side in HPC setups, however...

    On the consumer end, it's going to be PCIe as PHY connection for the MoBo's we buy.

    That isn't going to change anytime soon.
    Reply
  • Alex/AT
    Kamen Rider Blade said:
    That may be true on the Enterprise side in HPC setups, however...
    On the consumer end, it's going to be PCIe as PHY connection for the MoBo's we buy.
    That isn't going to change anytime soon.

    The thing is, I actually agree with ddcservices. In such an architecture mobo, PCIe can be just one of the endpoints of IF, situated close to PCIe slots themselves, and providing as much PCIe x.y lanes as the slot itself needs.
    Reply
  • 2Be_or_Not2Be
    I sure hope AMD adds PCIe 5.0 support to their AM5 platform. It's not a question of "can I use it now" - it's going to be part of the feature scorecard against Intel. If Alder Lake boards all say "PCIe 5.0 compatible/ready", then it's going to have the perception that it's better. We see it all the time in marketing - higher number must be better, even if it's not even used.

    I'm sure AM5 is being designed for many years of use, just like AM4. So you would think that it would make sense to have built-in support from the beginning. I know that it would be a factor in purchasing for myself, even if I'm not currently using it. If there is something that might be able to use it, whether GPU/storage/whatever, I'd rather have the support already there instead of having to buy another board.
    Reply
  • MMorris666
    Intel Lunar Lake & Emerald Rapids Leak: Jim Keller’s Royal Core designed to Kill Zen 5 - YouTube

    good vid. if links are not aloud the name of the channel is Moore's Law Is Dead, its his last video.
    Reply