Six months after starting up, the European Processor Initiative (EPI) has delivered its first architectural designs to the European Commission, completing the first phase of the project. The goal of the initiative is to create a new family of low-power European processors, primarily aimed at high-performance computing (HPC), the first of which is slated for 2021.
The consortium has not provided further details or specifications on which designs were delivered to the European Commission, but the project to build the first European HPC System consists of two streams that will generate a heterogeneous CPU: a general-purpose microprocessor stream for a low-power ARM-based HPC CPU, and an accelerator stream. There is also an automotive platform stream. A “significant part” of the technology will be European.
The accelerators, in particular, are seen as crucial to improving performance and reducing power consumption. EPI has described two kinds of accelerators: one based on the open source RISC-V instruction set architecture (ISA), and another one based on Kalray’s IP, a French company that builds many-core processors based on the very long instruction word (VLIW) ISA. The RISC-V technology will be used to build multiple accelerators for HPC and AI, such a vector processing unit (VPU), a stencil/tensor accelerator (STX) and a variable precision co-processor (VRP). The Kalray accelerator, on the other hand, is aimed at “deterministic automotive computation.”
The Common Platform is conceived towards the heterogeneous future and with the concerns of high-bandwidth and efficient data movement. In particular, the package consists of two chiplets, likely the ARM-based general processor and either the RISC-V-based accelerator for HPC or the Kalray accelerator for automotive, and several stacks of HBM memory connected via an interposer.
Manager of electric/electronic architecture at BWM Group Research, Matthias Traub, said: “The combination of general-purpose processors, hardware accelerators, security modules, and further IP modules on a system-on-chip is one of the key success factors for realizing a high-performant and energy-efficient automotive computing platform for autonomous driving and connected mobility.”
EPI’s goals go beyond the silicon and hardware, however. By using a holistic, co-design approach, it also wants to deliver all the system and runtime software such as the OS, developer kits, compiler, and libraries, or in other words, the full stack and system.
Roadmap and Target Markets
EPI wants to establish itself a new commercial entity, hence the platform was conceived with economic viability in mind. To that end, the technology is not just limited to HPC and AI, but it also wants to cover other applications such as the data center and the automotive sector. For the latter segment, it wants to develop customized processors to meet the requirements for autonomous cars.
The first family, codenamed "Rhea," will come to market in 2021. It will contain both ARM, RISC-V, and external IPs. It will serve as the basis for a European pre-exascale system, and it will also include an automotive proof-of-concept. EPI also plans to deliver the second family, Cronos, in 2022-2023. It will be used for the European exascale system and includes an automotive CPU.
EPI was started in December last year, and the first stage has an initial duration of three years. General Manager of EPI Philippe Notton said: “It is a privilege to lead this consortium and enable the creation of a new big player in the field of advanced semiconductors in Europe. We have the best teams, and a huge portfolio of expertise on board from deep node submicron, co-Design, computer science, to HPC, and automotive end-products.”
The consortium started with 23 members from 10 countries, including Infineon, BWM and multiple universities, but has added three more since. It is funded by the European Union’s 2020 Horizon program. EPI is also part of a broader strategy under EuroHPC Joint Undertaking to build and deploy in Europa the most powerful supercomputers in the world.
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