Unisantis Electronics, a startup led by Fujio Masuoka, the inventor of NAND memory, has developed Dynamic Flash Memory (DFM), a volatile type of memory that promises four times higher density than dynamic random access memory (DRAM) along with higher performance and lower power consumption.
DRAM memory relies on arrays of charge storage cells consisting of one capacitor and one transistor per data bit. Capacitors charge transistors when '1' is recorded into that cell and discharge when '0' is recorded into that cell. The arrays are arranged in horizontal wordlines and vertical bitlines. Each column of cells consists of two '+' and '−' bitlines that are connected to their own sense amplifiers that are used to read/write data from/to the cells. Both read and write operations are performed on wordlines, and it is impossible to address a single bit.
Unisantis' Dynamic Flash Memory uses a Dual Gate Surrounding Gate Transistor (SGT) to eliminate capacitors and uses 4F2 gain cell structures (which are smaller than 6F2 used by DRAM today), something that significantly increases bit density (by up to four times) of memory compared to DRAMs. DFM is not the industry's first capacitor-less type of random access memory (RAM), but previous attempts were unsuccessful.
According to Unisantis, unlike ZRAM (where the margins between 1 and 0 have been too narrow), its DFM has significantly increased '1' and '0' margin results, increasing speeds and improving the reliability of the memory cell. DFM uses the PL (Plate Line) gate to 'stabilize' the FB (Floating Body) by separating '1' write and '0' erase modes, Unisantis says.
Unisantis is an IP licensing company that does not produce memory or commercialize its technologies. The company's DFM will only come to market if Unisantis manages to persuade the industry (namely SoC and memory makers) to adopt its dynamic flash memory. Since DFM uses conventional CMOS materials and does not require very sophisticated manufacturing methods, it may indeed be commercialized. Meanwhile, the company's Dual Gate Surrounding Gate Transistor (SGT) IP could be licensed by various parties that want to take advantage of GAAFET-type transistors.
The DFM technology was described by its inventors, Drs. Koji Sakui and Nozomu Harada earlier this month at the 13thIEEE International Memory Workshop.
