Intel's 10nm Cannonlake Chips Won't Arrive Until Second Half Of 2017

In its earnings call, Intel said that its 10nm transistors will be delayed by about six months, because the transition period for process nodes has grown from the usual two years to two and a half years for the past two generations (14nm and 10nm).

Intel initially promised that the production of its 14nm Broadwell chips would start in late 2013, but they only technically appeared in late 2014, with most new devices adopting the 14nm chips in the first half of 2015. Intel previously thought that the 10nm Cannonlake chips would be available late 2016 or early 2017, but now the company admitted that we shouldn't expect it until the second half of 2017.

Intel's CEO, Brian M. Krzanich, said that "the last two technology transitions have signaled that our cadence today is closer to 2.5 years than two."

Therefore, if broad availability for 14nm chips arrived in early 2015, then we should see 10nm chips late 2017, and 7nm chips from Intel in the first half of 2020.

Intel's announcement about its process delays came days after IBM said it has a working chip prototype built on a 7nm process technology. IBM's announcement could be a sign that the company along with its partners, Samsung and Global Foundries, is ahead of Intel in making 7nm chips viable.

IBM also said that it has used EUV lithography to create the 7nm prototype chip, while last year Intel was still counting on non-EUV/multi-patterning for its 7nm process. All of this means that IBM and its partners may finally beat Intel to a process technology generation, something that hasn't happened in decades.

TSMC's leaked process roadmap

Intel may still win the race to 10nm, but the company expects its 10nm chips to appear in the second half of 2017, which is around the same time TSMC wants to ship 10nm chips for Apple (with silicon sampling starting about a year earlier). This means that either Intel may lose the 10nm race to TSMC, or if it does win, it won't be by a very wide margin.

In the earnings call, Intel announced that it will essentially give up on its tick-tock strategy, which has been disrupted by the latest delays, and will instead launch not two, but three product generations in the two and a half year time frame.

With the tick-tock strategy, the company would have launched the Skylake chips this year, and then about a year later it would have launched the Cannonlake generation. However, it will now introduce another generation in between them, called Kaby Lake, which will essentially be Skylake with some performance improvements. The chip will also be built on 14nm, just like Skylake, and is expected to arrive in the second half of 2016, or about a year after Skylake.

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Lucian Armasu
Lucian Armasu is a Contributing Writer for Tom's Hardware US. He covers software news and the issues surrounding privacy and security.
  • Xivilain
    IBM will more than likely sell the intellectual property than produce chips again.

    Intel is rolling in the dough while they're ahead, with no competition in some markets.

    As an Intel and Nvidia consumer... I want AMD to make a HUGE comeback.
    Reply
  • Bloob
    At 7nm the viability of x86 on mobile devices will be interesting to witness.
    Reply
  • jimmysmitty
    The thing is that Intel does a lot of the R&D themselves. They do utilize other technologies but they take them to see their viability for their process. Intel has been aware for quite some time that beyond 10nm will require a new material as silicon is getting stretched further than it can go.

    IBM however is working in a consortium to move to the next process node because without that none of the other companies would have the R&D experience to keep up with Intel let alone beat them to a node.

    That said, the viability of the 7nm process node with a functioning CPU is what matters as right now it is just transistors.

    There are also rumors that even SiGe will need to be replaced beyond 7nm.
    Reply
  • digitaldoc
    With not much competition, they are delaying the inevitable. Will there be anything smaller than 7 nm? At some point the die shrink will need to stop. This can get followed with additional cores, but then that will get maxed out at a certain point where more cores does not help as data is transferred around to get processed.
    Reply
  • TechyInAZ
    This will be a huge leap in laptop performance, with low wattage PLUS solid state batteries coming at that time means all day battery life for mainstream laptops is something to consider.
    Reply
  • jimmysmitty
    16265877 said:
    With not much competition, they are delaying the inevitable. Will there be anything smaller than 7 nm? At some point the die shrink will need to stop. This can get followed with additional cores, but then that will get maxed out at a certain point where more cores does not help as data is transferred around to get processed.

    Well they could come across some miracle technology that could get them to Picometer size. I mean people probably though Nanometer was near impossible back in the old days.

    That said, the best solution would probably be stacking but then there are the issues with heat dissipation.
    Reply
  • aldaia
    It's all about money, even Moore's law is not about technology but about economy. When Intel was full of money coming from the PC industry it managed to pull ahead of its competitors. AMD reached a maximum CAPEX of $3 billion, and couldn't follow Intel afterwards, in the end it was forced to get rid of its foundry. During the last years however, Intel CAPEX has reached a maximum at about 11 billion and then started to decline. Meanwhile, TSMC and Samsung have been flooded with money from the mobile industry (Apple in particular has very big pockets). Samsung Electronics is expected to reach an all-time high CAPEX of US$15 billion in 2015, TSMC will be $10.8 billion, while Intel will spend little above $8 billion. Just follow the money.
    Reply
  • photonboy
    Die size:
    At some point the effort becomes so hard that even if you could it's cost prohibitive. We'll start to see a shift to using different materials.

    Performance can't keep ramping up. Once die size gets to a certain point we're only left with architectural tweaks and ramping up frequency by using different materials.

    I didn't include increasing the number of cores because that stops being possible once die size shrinking stops.

    More efficient use will go a long way (software) or offloading to the cloud but in general we'll see a diminishing return of performance.

    On the other hand we can also just add a few more CPU's or GPU's to a system as they get cheaper and software supports them better.

    I think the desktop PC will end up being "good enough" with net connectivity taking up the slack.
    Reply
  • Bartendalot
    Die size:
    At some point the effort becomes so hard that even if you could it's cost prohibitive. We'll start to see a shift to using different materials.

    Performance can't keep ramping up. Once die size gets to a certain point we're only left with architectural tweaks and ramping up frequency by using different materials.

    I didn't include increasing the number of cores because that stops being possible once die size shrinking stops.

    More efficient use will go a long way (software) or offloading to the cloud but in general we'll see a diminishing return of performance.

    On the other hand we can also just add a few more CPU's or GPU's to a system as they get cheaper and software supports them better.

    I think the desktop PC will end up being "good enough" with net connectivity taking up the slack.
    Reply
  • Aspiring techie
    It looks like the era of process node shrinks is coming to an end. They can't go on forever. 1nm is the width of 10 graphene atoms, so the hard limit appears to be coming within the next decade or two. Still, we need to pursue the new technologies and enjoy the improvements while they still coming.
    Reply