Intel demonstrates Itanium multi-core processor

San Francisco (CA) - As announced last week, Intel today showed its multi-core processor approach in the opening day keynote of IDF Fall. President and COO Paul Otellini demonstrated the technology in the shape of the next-generation Itanium processor, code-named Montecito.

In front of a crowd of a about 5000 visitors, Otellini noted that the technology will be introduced in a whole "product lineup", not limited to the server and workstation products Itanium and Xeon. The Montecito processor on the stage carried 1.72 billion transistors and 2x12 MByte of L3 cache for a total of 26.5 MByte of cache memory, according to Otellini. The chip will feature parallelism capabilities on a instruction and thread level. Compared to the current 130nm Itanium 2 chip, Montecito will post a performance increase of about 25 percent in enterprise environments, Intel said.

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