Intel Preps 3nm GPU, Server Chips: Rumor

(Image credit: Intel)

Earlier this year Intel formally confirmed that some of its 2023 CPUs would be made by Taiwan Semiconductor Manufacturing Co. using an unspecified manufacturing technology. Fresh rumors from Taiwan indicate that Intel is prepping four products that will be made using TSMC's N3 (3nm) node and the line-up looks rather curious (and perhaps unrealistic). Furthermore, production could start considerably earlier than expected, a very unlikely turn of events. As this is a rumor, it is best read with a grain of salt.

Four Products

Apple and Intel are expected to be among the first companies to gain access to TSMC's N3 fabrication process sometime next year. While we can make logical guesses about what Apple might do with N3, Intel's plans have largely remained a mystery. Based on unofficial information from Taipei-based Economic Daily, Intel is readying one GPU and three server processors that will be made using TSMC's N3 technology, a curiously (if not strangely) looking line-up of products. Since the information could come from only one source, take it with a huge grain of salt. 

Intel confirmed last year that it had been working on 'Atom and Xeon based SoC on Intel and TSMC processes.' In fact, the company has a quite competitive line-up of Atom-badged SoCs (Snow Ridge, Elkhart Lake) for 5G base stations, edge computing, and IoT applications, some of which could be attributed to server-class solutions. Producing next-generation Atom-branded (or Xeon-branded) SoCs for these applications using a TSMC process technology in general makes a lot of sense since they have to be cheap and low power (this is where TSMC's N3 might come into play). Though, we do not know for sure what Intel is planning. 

Seeing a GPU product among Intel's first rumored N3 chips is surprising for many reasons. Graphics processors do not use leading-edge nodes since they require GPU specific IP blocks like high-speed internal and external interfaces or output interfaces (DisplayPort, HDMI, eDP, etc.) that do not benefit from high transistor densities as they barely scale. Meanwhile, compute GPUs for AI and HPC (TSMC uses the term HPC for accelerator ASICs, CPUs, GPUs, FPGAs, networks controllers, SSD processors, and some types of chips) applications have different requirements and might adopt almost any node offering a required transistor density and sufficient performance. 

At this point we do not know anything about Intel's GPU plans beyond Xe-HPG (aka DG2), Xe-HP, and Xe-HPC (aka Ponte Vecchio). Hypothetically, Intel could employ TSMC's N3 to make a small 'classic' GPU and use the chip as a pipe cleaner for the process (though such pipe cleaning makes little sense for CPUs or SoCs). Or it could use TSMC's N3 for a compute GPU tile and then use it for a datacenter or an HPC-bound product (but whether or not Intel needs a new DC or HPC GPU in early 2023 is a question).

Ramp Set to Start in… July '22?

There is another controversy in the report. Mass production of at least one of these chips is said to start as early as in July, 2022, which seems a little early for N3 to enter HVM (high volume manufacturing) stage. N3 is set to start ramping in the second half of 2022, but usually when companies state second half, they mean the backside of the year, not the middle of the year. Officially, N3's ramp is three to four months behind N5 (which started ramping in April '19). 

"N3 is about three to four months delay[ed] compared with 5-nanometer," said C.C. Wei, chief executive of TSMC, at the most recent earnings call with analysts and investors. "3 nm technology is very complicated and in both processing technology and also the customers' product design. So, we work with a customer, and finally, we decided to ramp up in the second half of next year. […] We decided with our customer [to] best fit their needs." 

Depending how you count, July could be the first month of N3's ramp, especially if you take into account a DigiTimes report from earlier this week which states that TSMC was on track to start mass production of Apple's SoCs for 'either iPhones or Mac computers' in the second half of 2022. The use of the words clearly indicates that there is no solid information about what Apple will produce using N3 next year. Furthermore, an iPhone-bound chip has to enter HVM in April if Apple is to introduce its new iPhones in September and start selling them in volume in October – November.  

Meanwhile, C.C. Wei implied at the earnings call that smartphone SoCs will be the biggest adopters of N3 technology in its first year in terms of volumes. So, whatever non-smartphone N3 chip enters production in 2022 or 2023, its volumes will be lower when compared to volumes of smartphone components made using this node. 

"The N3's first year is ramping up, still smartphone plays the biggest role," said Wei. "HPC* application is also important and getting more and more important. […] So, in the N3 node, in addition to the smartphones, we do expect the HPC applications will become important." 

TSMC has over 480 customers and companies like Qualcomm or MediaTek might adopt N3 for their smartphone SoCs ahead of Apple. Though, Apple might still be ahead of its rivals with an N3 SoC for PCs.


Intel's official plans for 2023 are vague, they include TSMC-made processor products, though we do not even know their codenames. These plans also do not mention any GPUs. To that end, consider any Intel and N3-related leaks with extreme caution as they may be only partly correct, or completely incorrect.  

The biggest question about Intel's and Apple's N3 plans is not even when their chips enter mass production stage, but rather which chips will be made using 3 nm first. TSMC itself expects smartphone SoCs to lead all other N3 chips in terms of volumes in the first year, so do not expect Intel to use N3 for its products aimed at high-volume PCs, at least not in the first year of N3's ramp. 

All things considered, while we can expect some of Intel's 2023 N3 products to enter production sometimes in 2H 2022 (say, in Q4), we would refrain from making guesses about the nature of the alpha product. In fact, given that N5 will be available for HVM only in the second half of the year, it will be interesting to see what product will be first to adopt this node. 

Anton Shilov
Contributing Writer

Anton Shilov is a contributing writer at Tom’s Hardware. Over the past couple of decades, he has covered everything from CPUs and GPUs to supercomputers and from modern process technologies and latest fab tools to high-tech industry trends.

  • Giroro
    Maybe something got lost in translation. It might not be TSMC N3. It could be Intel 3, which I think is actually a rename of 14nm++++++ superfin turbo HD remix.
  • peachpuff
    How the mighty have fallen... using its competitors manufacturing capabilities. There must of been a lot of gasps at intel when they announced this.
  • Co BIY
    They have been one of TSMC's largest customers for many years now. With demand for all production capacity worldwide completely overwhelming this is the fastest way to grow. They have proven they have the ability to sell everything they can make now and probably quite a bit of what others can make for them. Just to maintain market share they have to add capacity.

    All the major fabs are limited in how fast they can add capacity by how many machines/tools they can get from ASML.
  • JayNor
    The Xe-HPC compute tiles and Xe-HPG entire chip are reported to be built at TSM already. GPUs run pretty hot and take up a lot of room. I think Intel would use 3nm shrinks on these to get the space and power savings while holding performance the same. Intel can stack compute tiles on top of a different process io tile ... already demoed with Lakefield and in progress on Xe-HPC.

    For the Xeon CPUs ... perhaps Intel is moving to large number of Atom tiles on some server chips as a direct response to Apple and other small core server solutions.

    Also, the TSM hybrid bonding stacked SRAM appears to be ahead of Intel's hybrid bonding development, so perhaps 3NM tiles of stacked SRAM would give Intel an advantage over AMD's v-cache density. Makes sense.
  • mdd1963
    No reason to doubt any of these rumors, I mean, given the history of prompt rollout of 10 nm to the desktop the last half a decade or so...(and counting...)
  • zodiacfml
    glad you mentioned SoC or products of smaller Android vendors. early 3nm will definitely be low volume, better to sell the wafers to smaller companies for the meantime.