Intel Preps 3nm GPU, Server Chips: Rumor

Intel
(Image credit: Intel)
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Earlier this year Intel formally confirmed that some of its 2023 CPUs would be made by Taiwan Semiconductor Manufacturing Co. using an unspecified manufacturing technology. Fresh rumors from Taiwan indicate that Intel is prepping four products that will be made using TSMC's N3 (3nm) node and the line-up looks rather curious (and perhaps unrealistic). Furthermore, production could start considerably earlier than expected, a very unlikely turn of events. As this is a rumor, it is best read with a grain of salt.

Four Products

Anton Shilov
Contributing Writer

Anton Shilov is a contributing writer at Tom’s Hardware. Over the past couple of decades, he has covered everything from CPUs and GPUs to supercomputers and from modern process technologies and latest fab tools to high-tech industry trends.

  • Giroro
    Maybe something got lost in translation. It might not be TSMC N3. It could be Intel 3, which I think is actually a rename of 14nm++++++ superfin turbo HD remix.
    Reply
  • peachpuff
    How the mighty have fallen... using its competitors manufacturing capabilities. There must of been a lot of gasps at intel when they announced this.
    Reply
  • Co BIY
    They have been one of TSMC's largest customers for many years now. With demand for all production capacity worldwide completely overwhelming this is the fastest way to grow. They have proven they have the ability to sell everything they can make now and probably quite a bit of what others can make for them. Just to maintain market share they have to add capacity.

    All the major fabs are limited in how fast they can add capacity by how many machines/tools they can get from ASML.
    Reply
  • JayNor
    The Xe-HPC compute tiles and Xe-HPG entire chip are reported to be built at TSM already. GPUs run pretty hot and take up a lot of room. I think Intel would use 3nm shrinks on these to get the space and power savings while holding performance the same. Intel can stack compute tiles on top of a different process io tile ... already demoed with Lakefield and in progress on Xe-HPC.

    For the Xeon CPUs ... perhaps Intel is moving to large number of Atom tiles on some server chips as a direct response to Apple and other small core server solutions.

    Also, the TSM hybrid bonding stacked SRAM appears to be ahead of Intel's hybrid bonding development, so perhaps 3NM tiles of stacked SRAM would give Intel an advantage over AMD's v-cache density. Makes sense.
    Reply
  • mdd1963
    No reason to doubt any of these rumors, I mean, given the history of prompt rollout of 10 nm to the desktop the last half a decade or so...(and counting...)
    Reply
  • zodiacfml
    glad you mentioned SoC or products of smaller Android vendors. early 3nm will definitely be low volume, better to sell the wafers to smaller companies for the meantime.
    Reply