Engineers from the MIT and Analog Devices have created the most complex chip design yet that uses transistors made of carbon nanotubes instead of silicon. The chip was manufactured using new technologies proven to work in a commercial chip-manufacturing facility.
The researchers seem to have chosen the RISC-V instruction set architecture (ISA) for the design of the chip, presumably due to the open source nature that didn’t require hassling with licensing restrictions and costs. The RISC-V processor handles 32-bit instructions and does 16-bit memory addressing. The chip is not meant to be used in mainstream devices quite yet, but it’s a strong proof of concept that can already run “hello world”-type applications.
One advantage transistors made out of carbon nanotubes have over silicon transistors is that they can be manufactured in multiple layers, allowing for very dense 3D chip designs. DARPA also believes that carbon nanotubes may allow for the manufacturing of future 3D chips that have performance similar or better than silicon chips, but they can also be manufactured for much lower costs.
As Moore’s Law has slowed down in the past decade, chip manufacturing has become increasingly more expensive with every chip node to which semiconductor companies upgrade. As silicon chip manufacturing costs increase, carbon nanotube transistors may start to become more appealing and viable, even if they are far less proven in the real world compared to silicon transistors.
MIT assistant professor Max Shulaker started working on this project ten years ago. In 2013, his team was able to showcase a one-bit 178-transistor processor. Now, his team was able to create a 15,000- transistor RISC-V processor with support for 32-bit instructions and 16-bit data.
Shulaker told IEEE Spectrum:
“Ten years ago, we hoped this was possible. Now we know it is possible… and we know it can be done in commercial facilities.”
How the RV16X-NANO Was Created
The engineers at MIT, Analog Devices, and later Skywater Technology Foundry, created the RISC-V chip, dubbed RV16X-NANO, by developing three new commercially-viable technologies to get around the issues of low carbon nanotube purity and uniformity, as well as not being able to create complementary n-type and p-type transistors to form complementary logic circuits.
When trying to make carbon nanotube transistors, a solution is spread over a silicon wafer. However, the carbon nanotubes tend to group in bundles of 1,000 or more, and those bundles can’t be used to create transistors. This is a problem for large-scale chip manufacturing if it happens too often, as then too many chips would have to be thrown away.
One of Shulaker’s students, Christian Lau, was able to come up with a solution, called “RINSE,” that would allow the manufacturer to “wash-up” the bundles of carbon nanotubes from the wafer, leaving only the uniform and working transistors behind.
Post-doctoral researcher Gage Hill from the team was also able to come up with a second solution, called “DREAM,” to bypass the purity issue that has plagued all semiconductor companies that have attempted to build carbon nanotube chips so far. The best commercial processes can currently produce only 99.99% semiconducting nanotubes and 0.01% metallic nanotubes, which is too low of a purity level to be useful for building complex carbon nanotube chips.
Hill noticed that the biggest issue with the low purity level was not high power consumption, but noise. Once he and his team learned that, they began creating a solution that would combine logical gates in a way that lowers noise.
The third breakthrough, called MIXED, enabled the engineers to create electron-conducting (NMOS) and hole conducting (PMOS) transistors. These two types of transistors have already been used in silicon chips for decades, but not in carbon nanotube chips. Shulaker’s first one-bit chip used only PMOS transistors. The MIXED process is a low-temperature, so the transistors can be built on other layers of circuitry without damaging them.
In their paper, Shulaker and his team talked about all the limitations of their chip’s designs, such as the fact that the chip has a clock speed of only 10kHz, as well as potential improvements. Carbon nanotube processors are still very much in experimental phase, but at least now we may have a good roadmap for how to build them reliably. Their initial target market may not be server processors, but potentially something that doesn’t require high-performance such as microcontrollers, which makes the RISC-V ISA choice even smarter.
