At the annual Samsung Foundry Forum, Samsung announced its foundry’s roadmap for the next few years, which includes an 18nm FD-SOI generation targeting low-cost IoT chips as well as 8nm, 7nm, 6nm, 5nm, and even 4nm process generations.
18nm Fully Depleted – Silicon on Insulator (FD-SOI)
Samsung will expand its 28FDS process into a broader platform that will also offer Radio Frequency (RF) and embedded Magnetic Random Access Memory (eMRAM) options to its foundry customers.
The company will also launch the 18FDS process, which is the next-generation process that targets low-cost IoT chips.
8nm Low Power Plus (8LPP)
The 8nm process generation seems to be Samsung’s last generation before the company plans to use extreme ultraviolet (EUV) lithography. The company said that the 8LPP process combines key process innovations from its 10LPP process, as well as further improvements in performance and gate density compared to 10LPP.
7nm Low Power Plus (7LPP)
The 7LPP process will be Samsung’s first generation to use EUV lithography. According to the company, EUV lithography is what will allow Moore’s Law to continue and foundries to keep shrinking transistors down to 1nm.
6nm Low Power Plus (6LPP)
The 6LPP generation will improve on 7LPP, primarily by allowing greater area scalability and making chips more efficient.
5nm Low Power Plus (5LPP)
The 5LPP process will be Samsung’s last one to use a “FinFET” structure, as that type of architecture reaches its physical limits. This generation will also focus on area reduction and lower power consumption for chips.
4nm Low Power Plus (4LPP)
The 4LPP process generation will be Samsung’s first to use a “Gate All Around FET” (GAAFET) transistor structure, with Samsung’s own implementation dubbed “Multi Bridge Channel FET” (MBCFET). The technology uses a “Nanosheet” device to overcome the physical limitations of the FinFET architecture.
Pushing Moore’s Law Forward
Even though process generations may not accurately describe how small the transistors actually are these days, all major chip fabrication companies, including Intel, Samsung, Global Foundries, and TSMC, seem to be pushing Moore’s Law to its very limits and making steady progress with each process generation.
Samsung’s transition to EUV lithography and GAA FETs in the near future should lead to faster and more efficient chips in our devices for the foreseeable future. The competition is likely not far behind, or may even be ahead, but they may also be less willing to share information years ahead of production.
