Intel opens $3.5 billion advanced Foveros 3D chip packaging facility in New Mexico
Intel's advanced packaging facility in the U.S. starts operations.
On Wednesday, Intel announced that Fab 9 had begun operations at its Rio Rancho site in New Mexico. The $3.5 billion production facility was built to package chips using Foveros 3D technology and is one of Intel's first fabs dedicated solely to advanced packaging technologies.
"Today, we celebrate the opening of Intel's first high-volume semiconductor operations and the only U.S. factory producing the world's most advanced packaging solutions at scale," said Keyvan Esfarjani, Intel executive vice president and chief global operations officer. "This cutting-edge technology sets Intel apart and gives our customers real advantages in performance, form factor and flexibility in design applications, all within a resilient supply chain. Congratulations to the New Mexico team, the entire Intel family, our suppliers, and contractor partners who collaborate and relentlessly push the boundaries of packaging innovation."
Among other things, Intel uses Foveros 3D to build its latest Core Ultra 'Meteor Lake' processors for client applications, as well as Ponte Vecchio GPUs for artificial intelligence (AI) and high-performance computing (HPC) applications. As Intel and customers of its Intel Foundry Services contract chipmaking division adopt multi-chiplet designs, usage of Foveros 3D will increase significantly in the coming years.
The current iteration of Intel's Foveros 3D relies on a 600mm^2 interposer produced using its low-cost and low-power22FFL process technology that acts like an interconnect and a power delivery base die for chiplets that are stacked on it. For now, Foveros 3D features 36-micron bump pitches and supports up to 770 microbumps per square millimeter and up to 160 GB/s per mm bandwidth. However, the technology will adopt 25-micron and 18-micron micro bumps in the future, drastically improving interconnection densities. Furthermore, multiple Foveros 3D interposers can be interconnected using Intel's Co-EMIB technology to build ultra-large datacenter-grade devices.
Building an advanced packaging facility in New Mexico is an essential step in Intel's broader strategy to increase the production of advanced semiconductor products in the U.S. In addition to Fab 9, the company is constructing multiple leading-edge fabs in Arizona and Ohio.
"This investment by Intel underscores New Mexico's continued dedication to bring manufacturing back home to America," said Government Michelle Lujan Grisham. "Intel continues to play a key role in the state's technology landscape and strengthen our workforce, supporting thousands of New Mexico families."
Get Tom's Hardware's best news and in-depth reviews, straight to your inbox.
Anton Shilov is a contributing writer at Tom’s Hardware. Over the past couple of decades, he has covered everything from CPUs and GPUs to supercomputers and from modern process technologies and latest fab tools to high-tech industry trends.
-
rluker5 Reply
They could do that there. It would work great to feed rentable units. But I have a suspicion Intel will try to milk some of that goodness for a bit.usertests said:Put Adamantine L4 cache on client CPUs, and I'll be impressed.
Maybe if they don't want to introduce RUs for the next gen Adamantine might show up. -
usertests Reply
I never connected the two in my head. I do think it could be great for iGPUs, especially if they go HAM, think 4-8 GB instead of 128-512 MB.rluker5 said:They could do that there. It would work great to feed rentable units. But I have a suspicion Intel will try to milk some of that goodness for a bit.
Maybe if they don't want to introduce RUs for the next gen Adamantine might show up.