As AMD is enabling driver support for its upcoming Radeon RX 7000-series graphics cards based on the RDNA 3 architecture, various hardware enthusiasts and investigators continue to disclose new information about the upcoming GPUs. This week it's been uncovered that AMD's next-generation flagship GPU will apparently feature a 384-bit memory interface.
AMD's codenamed Navi 31 graphics processor (which is called SoC15 in AMD's drivers) supports six 64-bit MCD (memory controller dies, which is AMD's new way of calling memory controller), as discovered by VideoCardz in AMD's driver patch code published by Freedesktop.
This is the first time AMD has used the term MCD to describe its memory controller, as previously the company stuck to the term UMC (unified memory controller) both for GDDR and HBM memory subsystems. While the word die certainly has a concrete meaning, we are still not sure that AMD’s Navi 31 uses separate dies (i.e., chiplets) for memory controllers.
PC memory interfaces are typically 64-bit wide, so six 64-bit controllers would provide AMD’s Navi 31 with a 384-bit memory but, which is 50% wider than that of Navi 21. Keeping in mind that AMD’s next-generation GPU should naturally have more compute oomph than the current one, it should need more memory bandwidth. A wider memory interface is a good way to get it, though more Infinity Cache might also suffice.
To put things into context, a 384-bit 18 GT/s memory subsystem offers a peak bandwidth of 864 GB/s, which is significantly more compared to Radeon RX 6900 XT’s 512GB/s and 50% more than the RX 6950 XT's 576 GB/s.
A wider memory interface is relatively expensive to implement since it takes up a lot of die space. If AMD’s Navi 31 indeed comes with a 384-bit memory bus, that would indirectly mean the company is positioning its upcoming flagship GPU higher than its current-generation Navi 21. We do not know whether it will also mean a higher recommended price for AMD’s next-gen flagship, but that's certainly a possibility.
As always, since we are dealing with unconfirmed information from an unofficial source. AMD is not going to comment on an unreleased product, and the source code path has been edited after the initial change. The only things we know for certain are that RDNA 3 will feature some form of GPU chiplets, and that the GPU cores will be made using TSMC's 5nm N5 process.