EeroQ Tapes Out "Wonder Lake" Quantum Processing Unit Chip

Quantum computing specialist EeroQ recently announced the successful tape-out of its Quantum Processing Unit (QPU) chip. Codenamed “Wonder Lake” (which makes it sound like someone’s been paying attention to Intel’s codenames), Eeroq’s QPU was taped-out at a US semiconductor manufacturing foundry. Due to using a CMOS (Complementary Metal-Oxide Semiconductor) manufacturing approach that drinks deeply from standard chip manufacturing knowledge, the company expects its helium-based qubits to turn out far more scalable (and thus sustainable) than other qubit manufacturing approaches.

Qubits are units of computation in the quantum realm which are expected to unlock orders of magnitude more processing power in specific tasks, such as optimization problems, material physics, chemistry, and others.

“This scaling architecture has passed the rigorous design checks required for compatibility with today’s standard chip manufacturing process (CMOS),” said Nick Farina, EeroQ CEO, in a blog post.

Crucially, Wonder Lake’s qubit count is within the higher range we’ve seen yet; at 2,432 helium-electron qubits, it’s one of the most densely populated QPU designs. Initially proposed in 1999, EeroQ’s quantum technology is based on quantizing isolated electron spins suspended above pools of liquid helium (eHe).

Image 1 of 4

Quantizing here refers to "turning into qubits," - meaning that a particle or pre-existing material has been harnessed and has become an available computation unit. In this case, the technology takes advantage of an effect known as "Rydberg states," which translate the motion of the suspended electron (a property known as spin in physics) into computable representations of the 0s, 1s, and everything in between that's allowed by quantum computing.

The way EeroQ's Quantum Processing Unit (QPU) is fabricated is promising as well: it taps into the decades of expertise the semiconductor industry has had with CMOS technology. In the vein of what Intel is trying to do with its Tunnel Falls QPU, this approach allows the company to tap into a well-understood technology that serves as the basis for its technology. The fabrication process also sounds deceptively simple: wafers etched to EeroQ's specifications pass through the company's labs, where a layer of liquid helium is applied, and electrons are deposited onto purpose-etched reservoirs. With a small magnetic bump, the electrons floating above the helium layer (held in place by the CMOS reservoirs) can initialize their spin states. After that, it's just a matter of firing up whatever quantum workload can fit within the chip's circuits. According to EeroQ, using CMOS technology will eventually lead to fabrication-related quantum gate errors to a mere 0,01%. Let's call it quantum yield.

Of course, not all qubits are the same, so these can’t be compared to IBM and others’ superconducting qubits. For its part, Eeroq says its helium-electron qubits provide an extremely high 10+ second qubit coherence timeout with a high order of qubit connectivity - meaning that more complex qubit circuits can be built to accelerate pre-existing workloads or process new ones. Further, EeroQ says its qubits’ mobility across the helium layer gives them a 50% reduction in overhead for error correction mechanisms to be applied.

Error correction is considered the holy grail of quantum computing at the moment, and serious work is being done in the field of error mitigation that we hope leads towards error correction - that EeroQ uses this specific wording is relevant. That said, the company is still looking to extract actual utility from its CMOS-based QPUs; at the moment, they still haven’t demonstrated their two-qubit gate design, a necessary stepping-stone for a post-NISQ (Noisy Intermediate-Scale Quantum) future.

As we’re still in quantum computing’s infancy, it’s not a discussion on the quality of qubits and which technology is best; it’s instead a recognition that there are vast differences between qubit approaches. But it seems Wonder Lake’s call to fame doesn’t just sit there; the company called attention to how efficient their chip is: a design choice carved in stone as early as qubit choice and engineering design.

“There are two particularly challenging parts to making a useful quantum computer: high-quality quantum gates and a path to scale,” Farina writes in EeroQ’s blog. “With our latest work, we are proud to join the leadership ranks on scalability. Together with recent advances in error mitigation and more efficient algorithms, we can see the commercial quantum future coming together sooner than expected – led by the ability to leverage our architectural advantage to scale rapidly.”

As EeroQ puts it, their main advantage is that they thought about their quantum computing tech in reverse, focusing on achieving a many-qubit interaction before attempting to extract utility from the limited computing resources (usually one or two-qubit gates) they could physically explore. That focus on scaling allowed the company to build a quantum solution that requires only 30 control lines per chip - a marked reduction in the control complexity needed, for instance, on superconducting qubit systems. That, in turn, will allow for cost savings in computing area cost and how expensive the control system is.