We already know from various unofficial sources that Intel's upcoming 13th Generation Core 'Raptor Lake' processor is a mostly 'quantitative' rather than 'qualitative' update to the company's 12th Gen Core 'Alder Lake' CPUs. However, Intel apparently has a document that lists both processors with the same microarchitectures. Meanwhile, Redwood Cove and Crestmont cores are confirmed to power Meteor Lake.
Intel's Top-down Microarchitecture Analysis document, which is not available to general public, mentions Alder Lake and Raptor Lake CPUs as using the same microarchitectures, just like it does to Kaby Lake, Coffee Lake, and Comet Lake CPUs, according to @InstLatX64, a well-known hardware leaker who analyzes documentation for software developers.
Formally, Intel's Raptor Lake processors are equipped with up to eight high-performance Raptor Cove cores as well as 16 energy-efficient Gracemont cores. On paper, Raptor Cove is different from Golden Cove which power Alder Lake, but it looks like from software point of view both cores are the same thing. Meanwhile, Gracemont cores were meant to be shared between different generations given Intel's low-power core development cadence.
But while Intel's 13th Generation Core 'Raptor Lake' processors may just add energy-efficient cores, increase clocks, and maybe a few more perks, its successor will indeed be a rather game-changing product.
Intel's 14th Generation Core 'Meteor Lake' processor will be the company's first client product to use a multi-chiplet design as well as the first product to use Intel 4 process technology fabrication technology (previously known as 7nm EUV) for compute tile. Speaking of compute tiles, we should mention that it will use high-performance Redwood Cove cores and energy-efficient Crestmont cores, as revealed by @InstLatX64 in another post citing a PerfMon mapfile.csv obtained from an undisclosed source.
Considering the fact that Meteor Lake will use all-new CPU microarchitectures, we should probably expect new levels of performance and efficiency in general purpose workloads. Furthermore, since integrated GPU will now use a separate tile, it will not be as constrained by die size as significantly as it is today, so expect some additional performance as well.
