Massive LGA7529 Socket for Intel's 'Sierra Forest' Pictured

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Lots of small and energy-efficient cores with many pins

Intel
(Image credit: YuuKi_AnS/Twitter)

The first picture of Intel's LGA7529 socket for its upcoming codename 'Sierra Forest' processors powered by energy-efficient cores has been published by hardware leaker @YuuKi_AnS. The CPUs will use small Atom-class energy-efficient cores, and it will plug into a massive 7529-pin socket.

Intel's Xeon 'Sierra Forest' processor and the Birch Stream platform are designed for high-density cloud datacenters. These are for running workloads that benefit mostly from core count rather than from single-threaded performance. To that end, the core count of Sierra Forest system-on-chips will be significantly higher than regular Xeon processors based on high-performance cores, such as Emerald Rapids as well as Granite Rapids.

To feed those cores with data and power, Sierra Forest will use loads of pins, which explains the LGA7529 form-factor with a massive number of pins. Meanwhile, it does not look like Intel's LGA7529 socket is significantly bigger than the company's LGA4677 for Xeon Scalable 'Sapphire Rapids' processors and their successors, at least if we compare sizes of both sockets to the DDR5 memory slots located nearby. 

(Image credit: YuuKi_AnS/Twitter)

Unfortunately, the published image doesn't reveal many new details about Sierra Forest CPUs, such as the number of cores or memory channels. Still, if there are LGA7529 motherboards in the wild, it means server makers are likely (or will soon be) testing the future CPUs.

Intel's Xeon 'Sierra Forest' processor is set to be made on Intel 3 process technology and is set to become available in 2024.

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Anton Shilov
Anton Shilov
Contributing Writer

Anton Shilov is a contributing writer at Tom’s Hardware. Over the past couple of decades, he has covered everything from CPUs and GPUs to supercomputers and from modern process technologies and latest fab tools to high-tech industry trends.

30 Comments Comment from the forums
  • InvalidError
    Still 1472 pins short...
    Reply
  • More info on this leak:

    There are actually even more pictures of the socket and the specific 2S motherboard that is said to be designed for both Sierra Forest and Granite Rapids-AP CPUs.

    The posted listing at Goofish (as discovered by HXL) hints that the socket supports up to 128-core and 256-thread Granite Rapids-AP CPUs. The motherboard seems to have a 12-channel DDR5 memory layout featuring 2 DIMMs per channel, for a total of 24 DIMM slots.

    So I'm guessing SIERRA lineup should also max out at 128 cores, or maybe even more ? Anyway, we can see that the socket is a pre-production SKU from     LOTES .

    By the way, there have been several rumors/reports that the Intel Birch Stream platform was initially designed for the AP line of processors which has since been canceled. So this begs the question if Sierra Forest would be the only CPU lineup designed for this entirely new socket and platform, or will there be more SKUs/chips added in the near future.
    https://cdn.wccftech.com/wp-content/uploads/2023/01/O1CN01WVq7dG1lho7i3oQKo_53-fleamarket.heic_q50.jpg.webp
    https://cdn.wccftech.com/wp-content/uploads/2023/01/O1CN0114MO9W1lho7m3St3C_53-fleamarket.heic_q50.jpg-1092x1456.webp
    https://cdn.wccftech.com/wp-content/uploads/2023/01/O1CN01TPyDDv1lho7Z3yWaR_53-fleamarket.heic_q50.jpg-1456x1092.webp
    https://cdn.wccftech.com/wp-content/uploads/2023/01/O1CN01qi2mO91lho7i3qVGr_53-fleamarket.heic_q50.jpg-1456x1092.webp
    1620413976382443523View: https://twitter.com/9550pro/status/1620413976382443523
    EDIT: As per some recent rumors, it appears the Sierra Forest Xeon chips will house at least 344 cores which will be packed within 4 Compute Tiles, and each tile would pack 86 cores.

    The rumors also point to an even higher core count variant in the form of the 528 core variant which could pack up to 132 cores per tile but will more realistically only get 512 cores as one cluster would be disabled, IMO.
    Reply
  • JamesJones44
    Reminds me of the old Pentium Pro socket
    Reply
  • jkflipflop98
    JFC that's a computing powerhaus.
    Reply
  • zecoeco
    Sierra Forest is rumored to feature up to 300+ (4 tiles) efficient cores, so a socket with massive number of pins is no surprise.
    Reply
  • TLGalenson
    After some assumptions I am going to WAG at about 150 per CPU socket.

    This assumes E cores take up 50 percent of P cores and adds the additional number of pins mentioned.

    So for non-computationally intense loads this would make sense. And would put Intel up in this niche.

    Tom M (no relation)
    Reply
  • letmepicyou
    May I assume, given the look of that board, that some wild proprietary power supply is necessary to power it?
    Reply
  • InvalidError
    letmepicyou said:
    May I assume, given the look of that board, that some wild proprietary power supply is necessary to power it?
    One 24-pins like connector near the top-right corner, two ATX-12V-like connectors near the top-left corner, two 12V HPWR-like connectors in the bottom left and right corners, then another pair of EPS12/PCIe-AUX-like connectors closer to the bottom-mid, probably pass-through 12V for powering storage backplane boards connected to those Slim-SAS-like connectors.

    Definitely doesn't look like what you'd get from a typical ATX jobbie.
    Reply
  • zecoeco said:
    Sierra Forest is rumored to feature up to 300+ (4 tiles) efficient cores, so a socket with massive number of pins is no surprise.

    Yes, as per some recent rumors, the Sierra Forest Xeon chips will house at least 344 cores which will be packed within 4 Compute Tiles, and each tile would pack 86 cores.

    The rumors also point to an even higher core count variant in the form of the 528 core variant which could pack up to 132 cores per tile but will more realistically only get 512 cores as one cluster would be disabled, IMO.
    Reply
  • bit_user
    InvalidError said:
    Still 1472 pins short...
    Of 9001 pins? I don't get the reference.
    Reply