3D XPoint SSD Pictured, Performance And Endurance Revealed At FMS

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Paul Alcorn
Editor-in-Chief

Paul Alcorn is the Editor-in-Chief for Tom's Hardware US. He also writes news and reviews on CPUs, storage, and enterprise hardware.

  • Zaxx420
    Some may be not so impressed but this is just the very beginning of a tech thats just in its infancy (just 2 layers...lol)...give it 2-3 years and I bet it'll be a mind blow.
    Reply
  • manleysteele
    http://www.guru3d.com/news-story/micron-3d-xpoint-storage-is-four-to-five-times-as-expensive-as-nand.html

    This little blurb gives me pause. I'm waiting for Z-270 MB's in anticipation of the 3D X-point memory spec, but 4-5 times more expensive makes my head hurt.
    Reply
  • MRFS
    Allyn Malventano at pcper.com writes about the U.2 chart:

    http://www.pcper.com/news/Storage/FMS-2016-Micron-Keynote-Teases-XPoint-QuantX-Real-World-Performance

    "These are the performance figures from an U.2 device with a PCIe 3.0 x4 link. Note the outstanding ramp up to full saturation of the bus at a QD of only 4."

    If the bus can be saturated that easily, it's time to up the clock rate on PCIe lanes, at a minimum to 12 Gbps just like 12G SAS.

    I'm optimistic that these non-volatile memory technologies will get refined with time, and get cheaper with mass production. Also, the PCIe 4.0 clock will oscillate at 16G, so it's time the industry embraced the concept of "overclocking" storage a/k/a variable channel bandwidth.
    Reply
  • anbello262
    Well, 4-5 times more expensive should be expected, and even more. New technology, and when it comes to market the performance leap could be as big as the jump from HDD to SSD, and SSDs were 10 times more expensive at the beginning.

    I hope this continues, but I'm also afraid of a scenario were all XPoint technology belongs to just 1 or 2 big companies, which would be awful for pricing and compatibility.
    Reply
  • ammaross
    18415596 said:
    This little blurb gives me pause. I'm waiting for Z-270 MB's in anticipation of the 3D X-point memory spec, but 4-5 times more expensive makes my head hurt.

    Rather than 4-5 times more expensive than NAND, you should be thinking of it as half the price of DRAM (as it's closer to DRAM specs than it is NAND specs). The charts show it being crippled by the interface, not the tech.
    Reply
  • MRFS
    https://forums.servethehome.com/index.php?threads/highpoint-has-done-it-rocketraid-3800a-series-nvme-raid-host-bus.10847/
    Reply
  • anonymous1000
    "Much of the leading-edge developmental work to increase performance is focusing on peeling back these layers... such as reducing interrupts by utilizing polling drivers ... can offer drastic performance increases" - I really don't know how realistic this idea is, but maybe its worth trying using pcie entries (cards, cables) inside big data (fastest nand etc..) just as SAS controllers are used in SCSI /SATA/ethernet. Does that make sense? If many pcie connections to fast data can work simultaneously and manipulate the data, then we can drop Ethernet style switches with load balancing, latency and other last millennium concerns .. no?
    Reply
  • hannibal
    I expect it to be at least 10 times or even more expensive during the release than normal nand. In the longer run 4 times more than normal nand may sounds plausible.

    First devices will go to big corporates that handle a lot of data, like Google and Facebook who has more money, than is needed to get very high speed storage.
    So first devices are like luxury sport cars, fast and expensive.
    Reply
  • MRFS
    > I really don't know how realistic this idea is

    From an analytical point of view, I share your concern.

    Here's why:

    When doing optimization research, we focus on where
    a system is spending most of its time.

    For example, if the time spent is distributed 90% / 10%,
    cutting the 90% in half is MUCH more effective
    than cutting the 10% in half.

    Now, modern 6G SSDs are reaching 560 MB/second
    on channels oscillating at 6 GHz ("6G").

    The theoretical maximum is 6G / 10 bits per byte = 600 MB/second
    (1 start bit + 8 data bits + 1 stop bit = "legacy frame")

    So, what percentage of that ceiling is overhead?

    Answer: (600 - 560) / 600 = 40 / 600 = 6.7%

    WHAT IF we merely increase the channel clock to 8 GHz?

    Then, 8G / 10 bits per byte = 800 MB/second

    That alone raises the ceiling by 800/600 = 33.3%

    Now, add PCIe 3.0's 128b/130b jumbo frame
    (130 bits / 16 bytes).

    Then, 8G / 8.125 bits per byte = 984.6 MB/second

    984.6 / 600 = 64% improvement

    And, what if we increase the channel clock to 12G (like SAS)
    -and- we add jumbo frames too:

    Then, 12G / 8.125 bits per byte = 1,476.9 MB/second

    1,476.9 / 600 = 146% improvement

    I submit to you that the clock rate AND the frame size
    are much more sensitive factors.

    Yes, latencies are also a factor, but we must be
    very realistic about "how sensitive" each factor is, in fact,
    and be empirical about this question, NOT allowing
    theories to "morph" into fact without experimental proof.
    Reply
  • manleysteele
    18416571 said:
    18415596 said:
    This little blurb gives me pause. I'm waiting for Z-270 MB's in anticipation of the 3D X-point memory spec, but 4-5 times more expensive makes my head hurt.

    Rather than 4-5 times more expensive than NAND, you should be thinking of it as half the price of DRAM (as it's closer to DRAM specs than it is NAND specs). The charts show it being crippled by the interface, not the tech.

    I'm thinking of the usage, not the specs. In the end, no matter where it's deployed, it's still memory as storage, like NAND. It's a NAND replacement on a memory bus. The early adapters will pay a premium. I accept that. What I won't accept is 32-64GByte of storage, for the price of 2TBytes of storage in my precious memory slot. I'll just populate with memory and go on about my business in that case. Unless and until Intel and Micron get this price structure under control, I'll wait.
    Reply