To the untrained eye, Intel's new 10nm SuperFIN architecture sounds a lot less advanced than the TSMC 7nm process AMD uses on some of the best CPUs, but nanometer numbers can be deceiving, because both have similar density. Now, according to Oregon Live, Intel is planning to change the way it brands its process nodes to provide a better apples-to-apples comparison with competitors.
Oregon Live reports that Intel SVP Anne Kelleher recently told employees that company plans to change its numbering conventions to "match the industry standard."
Unfortunately, Intel did not disclose exactly what it intends to do, telling Oregon Live only that it thinks the current measurement system is inaccurate. So the company could either be planning to change the nanometer count on its process node names or change the way it talks about process nodes entirely.
Intel has talked a great deal on this topic in the past, so we can see where the company might be headed. In a discussion about three years ago, Intel offered details relating to a new measuring technique for measuring process node sizes that would take into account transistor density over a small area, and account for SRAM cell size (this would be your L1-L3 caches).
This technique should be a much more accurate way of measuring semiconductor chip performance, and performance per watt. Compared to simply measuring a single transistor itself (like we do today).
More specifically; this measurement would be disclosed as 'logic transistor density in units of MTr/mm squared' (i.e. Millions of transistors per square millimeter). The beauty of this measurement strategy is that it takes into account logic cell design, which is something that can vary a lot from architecture to architecture.
To address the issue of measuring SRAM -- or more simply, the processor's memory capabilities; Intel has talked about reporting the SRAM cell size separately, as its own distinct name or number. Instead of leaving cache speeds out of the equation (like we do today).
This is necessary because CPU/GPU caches can have a huge impact on CPU performance. Semiconductor processing units don't just rely on raw processing power but also on extremely fast caches which feed the processor data. Think of the cache as the processor's workbench or office desk.
Again, this is just what Intel has discussed in the past, so we don't know exactly what Intel has planned for its upcoming name changes for its new nodes. Either way, this new naming scheme won't be the 'end all be all for measuring CPU/GPU/ASIC performance. The performance of a new silicon product will always have to be reviewed in person to see what kind of performance the product really offers.
But, it's a great step towards getting a more accurate representation of what future process nodes can really do.
Meanwhile, Intel's flagship desktop CPU, Rocket Lake (see our Core i9-11900K review), just launched yesterday and remains on a 14nm process.
Indeed, let us call the 10nm node, Intel's red faced embarrassment node
I agree. Though I appreciate the irony that, way back in the day, Intel was trying to sell MHz/GHz measurements, and didn't seem pleased by AMD's PR (Performance Rating, I think was the phrase?) numbers.
Add in the irony that, even today, until Vermeer came out, the Intel crowd would complain about how AMD can't hit Intel's clock speeds, despite the IPC advantage.
I wonder how they're going to reconcile with not using the absolute number anymore?
Ok ok, sarcasm aside, I do like the idea of MTr/mm2 measurement. That said, let's say Intel's 10mm has the same MTr/mm2 as AMD. Does the fact that the Intel version is on a 10nm process vs AMD using a 7nm process mean that there's higher thermal dissipation to deal with per mm2? I would think it does, but that's just a guess. If my guess is correct, though, it should probably be factored in.
Of course Intel could be deceptive here. They know they plan to stack dies together, which could give them a silly way to 'double' their number if they consider the transistor density in a 2D plane. But logically it should only apply to the manufacturing process, not assembly.
the #nm isnt a standard.
thats why intels 10nm is closer to amd's 7nm
it was a dumb naming scheme to begin with and means nothing now.
actually adopting a standard is best for everyone in long term....now if only they'd also fix their SKU naming...
That being said, TSMC 5nm node is more dense than Intel's 10 nm node, so no matter what they do with the naming it's not going to change the fact that TSMC currently can produce a denser "chip" with better PPW characteristics.
You will take your i7-1185G7E and like it mister.