One explored option is the combination of DRAM with Flash on one chip, but another technology could become much more interesting for those who require performance over capacity. ST-MRAM, or Spin-Torque MRAM.
Everspin just announced its first ST-MRAM, built in a DDR3 form factor module. The device is compatible with the JEDEC DDR3 1600 specification with a "memory bandwidth of up to 3.2 GBytes/second at nanosecond class latency". Samples of the modules are available now and volume shipments are expected for 2013.
Interestingly, MRAM has been positioned for more than a decade as a potential higher-performance replacement for NAND Flash, due to its non-volatile characteristics. However, the technology is too far away from being able to compete on a capacity level - even this new chip has just 64 Mb (8 MB) capacity. In fact, Everspin is currently producing the only commercially available MRAM chips, which hold only 4 Mb and are produced in an antiquated 180 nm process. Remember, Intel's latest CPUs are built in 22 nm.
The upside, however, is MRAM's performance as well as its low power consumption. The memory technology can outpace not only Flash, but DRAM as well and is seen to be operating on the same level as SRAM. With some investment and product demand, MRAM may have an opportunity to appear on the big stage.
My First PC had 64KB (yes, that is a 'K') memory and a 5MB hard drive in full height 5 1/4" format.
Darn thing cost a month' salary too.
Anyway, this type chip technology has obviously some ways to go to find it's way into regular PCs, but there are all sorts of intermediate applications in the low power segment of the market that I can see for them in the very near future.
Flash, like the CPUs, is hitting a limit on how far silicon can go. DRAM is also increasingly having less of its silicon dies reserved for actual memory storage and more for other functions such as interconnects.
Someone explain it to me like you would an 8-year-old.
good luck guys, keep this up, can't wait for mainstream version!
Intel: Nope, too busy trying to beat down ARM and delivering the finishing blows to AMD.
Still, any silicon process lower than 40nm is hitting the limits of physics.
But I still question its use as system memory as opposed to system storage. I get the functional use - not losing stuff in the memory when the system looses power, whether by power outage or shutdown. But I still think the focus would be better applied to improved read/write performance between the memory and the storage device. If the idea is for all the information to eventually be placed on the storage device, it seems a little strange to me to make memory into a pre-storage device to write to a primary storage device. I only mention this all because a similar story a few days ago was walking about memory chips that could story data for years after loss of power.