Wafer Scale Quantum Chip Prototype to Accelerate Qubit Counts

Wafer Scale Quantum Computing
(Image credit: CEA/ C12)

French research institutions CEA and C12 Quantum Electronics have announced a novel quantum computer design. One that can only describe as a waferscale engine... for quantum. In an approach to CMOS manufacturing techniques and backed by the CEA's $5 billion annual funding, the companies aim to manufacture carbon nanotube-based qubits at scale - a 200 mm (7.9 inches) wafer at a time. As a result, transistor density now sees itself as a parallel to quantum density.

There have been some other quantum computing designs that aim to approximate themselves with transistor manufacturing in one way or another. The idea is that the more compatible qubit manufacturing is to that of existing silicon-aimed processes (such as those of TSMC's 4N or Intel 7), the more efficiently manufactured - and scaled - they can be.

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Francisco Pires
Freelance News Writer

Francisco Pires is a freelance news writer for Tom's Hardware with a soft side for quantum computing.

  • husker
    In the first 42 years of quantum computing research we go from 0 to 127 qbits. In the next three years we go from 127 to 1,000,000. Sounds about right.
    Reply