Intel "Xe4" and AMD "GFX13" codenames surface for next-gen 'Druid' GPUs

Big Navi die shot, Navi 21 — (Image credit: AMD)

It seems that the software divisions at AMD and Intel are setting the stage for their next-generation GPU offerings. The internal codenames for these GPUs, Intel's Xe4 and AMD's GFX13, have been spotted by Kepler and x86isdeadandback at X, as noted by VideoCardz. While this does not allude to the specifications, it shows that both teams are actively pouring resources into the development of their future graphics products.

Intel officially confirmed its fourth-generation Arc GPUs would be codenamed Druid, employing the Xe4 architecture, a while back. The firm has been notably quiet regarding its future GPU roadmap following Alchemist. With limited pre-launch hype, the desktop launch of Battlemage (Xe2) last December was also somewhat of a surprise. That being said, the successor to Battlemage, codenamed Celestial (Xe3), will arrive with Intel's Panther Lake CPUs, which are scheduled for HVM (High Volume Manufacturing) later this year.

Based on employee reports, Celestial has reportedly reached pre-silicon validation, where hardware design flaws are identified and resolved before committing to manufacturing. Tom Peterson's comments support this, stating Celestial's hardware is "baked", with software optimization the remaining task. He also added that the hardware teams have moved on to the next project, Druid (Xe4). Based on commits to the Dawn repository, developers are starting to integrate support for Xe4, which should fall under Intel's Gen15 umbrella.

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Internally, AMD uses GFXxx codenames to represent or identify different GPU IP blocks. We often find these designations, tied to the GPU architecture, like GFX12 for RDNA 4, in Linux kernel patches or firmware packages. According to a patch shared by leaker Kepler, AMD's next-generation GPUs will be part of the GFX13 series. As of now, the exact architecture has not been revealed, so the likely choices are between UDNA 1 and RDNA 5.

AMD has outlined its intent to unify the genome of its gaming-centric RDNA and compute-centric CDNA families under the banner of UDNA, similar to Vega. For comparison, Nvidia has taken a mixed approach with its products. Volta and Turing were separate architectures for data centers and consumers. Ampere combined the two foundations, but with the rise of generative AI, Nvidia dissected the two again with Hopper and Ada Lovelace. Blackwell now serves as the unified backbone of these two segments. A unified architecture leads to simplified development and better software support, but it might require compromising on specialized applications, which in this case will probably be gaming, if not carefully handled.

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Hassam Nasir is a die-hard hardware enthusiast with years of experience as a tech editor and writer, focusing on detailed CPU comparisons and general hardware news. When he’s not working, you’ll find him bending tubes for his ever-evolving custom water-loop gaming rig or benchmarking the latest CPUs and GPUs just for fun.

1 Comment Comment from the forums

bit_user

The article said:
Nvidia has taken a mixed approach with its products. Volta and Turing were separate architectures for data centers and consumers. Ampere combined the two foundations, but with the rise of generative AI, Nvidia dissected the two again with Hopper and Ada Lovelace. Blackwell now serves as the unified backbone of these two segments.
You're reading too much into their code names. The 100-series chips are always different than the 10n chips, found in client graphics cards.

One way to see this is in their respective CUDA Capabilities. First, you need to see which capability a given GPU has:
https://developer.nvidia.com/cuda-gpus
Then, check the specs of that capability:
https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#features-and-technical-specifications-technical-specifications-per-compute-capability
There, you can see how a server GPU like A100 (capability 8.0) supports 32 resident blocks, 64 warps, and 164 KB of shared memory per SM, while the client Ampere models (capability 8.6) support only 16 resident blocks, 48 warps, and 100 KB. That's in spite of how they're both called "Ampere".

Similar differences exist between the B100/B200/B300 (capability 10.0) and GB10n (capability 12.0) Blackwells. It sounds like the client Blackwells should be better (higher capability number, right?), but it really just means they're newer.
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