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Intel Comet Lake-S Arrives: More Cores, Higher Boosts and Power Draw, but Better Pricing

Thinner Die, Fatter IHS 

Intel increased the power-to-performance ratio of its 14nm process by over 70% since the first iteration landed five years ago. Still, the company is surely reaching a diminishing point of returns as it enters the sixth or seventh round of optimizations. Recently, Intel has turned to dialing up the clocks and cores in tandem with peak power consumption. As you would imagine from the Core i9's 250W peak power draw at stock settings, boosting heat transfer efficiency to the die is becoming more important, especially if you're overclocking.

(Image credit: Intel)

Intel moved from pTIM (polymer TIM - a.k.a. thermal grease) with its Coffee Lake K-series chips (and some standard models) to Solder TIM.  STIM boosts heat transfer efficiency between the die and heat spreader, which lowers the operating temperature and often unlocks a higher overclocking ceiling. Lower temperatures also help during stock operation—they typically enable longer turbo boost durations and should lessen cooling requirements compared to the same chip with pTIM. 

With up to ten cores now cooking away under the integrated heat spreader (IHS), Intel decided to further refine its approach by using a thinner die for the K-series Comet Lake CPUs. Intel says that it has reduced the processor die z-height (thickness) by 300 micro millimeters (from 800 to 500) to improve thermal transfer efficiency. Think of this technique as similar to lapping the die itself, thus shaving away a thin layer of silicon that rests between the heat-generating compute elements and the STIM. 

Intel then pairs this approach with a thicker copper IHS. The company says copper is three times more efficient at transferring heat than silicon (which can actually act as an insulator), so more of the former is better for cooling than the latter. It also makes sense to thicken the IHS to assure adherence to existing socket z-height dimensions—that's part of what enables backward compatibility between LGA 115x coolers and the LGA 1200 interface.    

Intel specified that it uses the 'die-thinning' technique on K-series models, but its messaging around the rest of the models is unclear. We do know the company still uses STIM on all of its K-Series processors, but some Core i5-10400 and 10400F chips will use either STIM or pTIM, which will vary based on the manufacturing location. We're following up to see if there is a discernible difference in packaging or part numbers.

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(Image credit: Intel)
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(Image credit: Intel)

Intel holds the overclocking crown with its higher frequency ceilings, but the company continues to march forward with the development of its overclocking features and software

Comet Lake brings a completely new and somewhat unexpected feature: Now you can enable or disable hyper-threading (HT) on a per-core basis. This granular control could be useful for any number of scenarios, with the most obvious benefit being to reduce heat output, thus easing cooling requirements and enhancing turbo boost duration. Not to mention overclocking. You could also identify the 'weaker' cores in your system during overclocking and then selectively disable HT on those cores. Paired with targeted per-core overclocking, that could be a promising feature. 

However, disabling HT and pushing cores to higher frequencies might not be as productive if active threads aren't targeted to the faster cores. We're not sure if there is any co-operation between Intel's Turbo Boost 3.0 Max and the threading controls, but it seems doubtful. We do know that the HT feature can be triggered via Intel's eXtreme Tuning Utility (XTU), but it requires a reboot before threads are enabled/disabled. 

Intel has also enabled fine-grained voltage/frequency (VF) curve adjustments in the XTU software, which allows you to adjust the various points in the curve. Some of these points on the curve were not previously available (including idle, which makes this feature appealing to undervolters). Intel won't describe the various points in detail because they are proprietary, but the company says you can see the changes in XTU. Intel also exposes the requisite VF curve and HT disable/enable hooks to external applications so that motherboard vendors can incorporate the feature into the BIOS. Third-party software applications can also use the feature.

Intel has also bulked up its PCIe overclocking functionality by creating a system that allows motherboard vendors to connect an external clock generator to the PCH, thus bypassing the fixed 100 MHz clock. Intel says this enables speeds (up to) ~104 to ~108 MHz, thus boosting PCIe and DMI throughput slightly. Intel positions this feature as designed for extreme/professional overclockers.

Comet Lake Security Mitigations

VulnerabilityCoffee Lake Refresh/Whiskey Lake MitigationComet Lake
Variant 1 (Spectre)Operating SystemOperating System
Variant 2 (Spectre)Microcode + Operating SystemMicrocode + Operating System
Variant 3 (Meltdown)In-SiliconIn-Silicon
Variant 3aMicrocode + Operating SystemMCU
Variant 4Microcode + Operating SystemMicrocode + Operating System
L1TF (Foreshadow)In-SiliconIn-Silicon
MFBDS/RIDL-In-Silicon
MSBDS/Fallout-In-Silicon
MLPDS-In-Silicon
MDSUM-In-Silicon

Intel has suffered troubling performance losses as the company works to patch an onslaught of security vulnerabilities via software patches. Through slow integration of in-silicon fixes to the same problems, the company has reduced some of the performance overhead associated with the mitigations. 

Intel shared Comet Lake's security mitigation matrix with us, and it appears that the new chips carry the same mitigations found with its latest revisions of its silicon, like the later Coffee Lake Refresh R0 die revisions we tested with the Core i9-9900KS

As we can see in the table above, these mitigations do represent a step forward from the Coffee Lake Refresh chips at launch, but the R0 stepping die with the same level of mitigations first landed in our labs in October 2019. It's a bit surprising that Intel hasn't made more progress in the interim.

Paul Alcorn

Paul Alcorn is the Deputy Managing Editor for Tom's Hardware US. He writes news and reviews on CPUs, storage and enterprise hardware.