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Perfect Timing: DDR Performance Analysis

Looking Ahead: CL1.5

From a technical point of view, there are two ways to increase performance for DDR SDRAM. The first method is to increase the clock speed to 200 MHz (400 MHz DDR), a method which is currently championed by VIA. This will come to fruition this year with the release of the KT400 chipset for Athlon systems. The second method is to further reduce CAS latency. This is technically possible with DDR SDRAM, and CL1.5 would be the next level of development. Still, it’s questionable whether this method will really become established or not, since it requires considerable effort. Making the step to four data transfers per clock cycle alone would also require much effort, similar to the system bus of the Pentium 4. Here, the bandwidth would increase significantly, thereby the question of fast timings would be put aside for a while.

Test Setup

Test System
CPUIntel Pentium 4, 2 GHz
MotherboardAbit BD7i845 DDR Chipset
RAM256 MB PC2100 DDR-SDRAM,CL2 (Corsair Micro)
FireWire-ControllerTexas Instruments
Graphics CardnVIDIA GeForce 3,64 MB DDR
Network3COM 905TX PCI 100 MBit
OSWindows 2000 Professional
Office Applications BenchmarkBAPCo SYSmark 2002
OpenGL PerformanceSPECviewperf 6.1.2Quake III Arena
Memory PerformanceSiSoft Sandra 2002 Pro
Game Performance3DMark 2001 SE
Drivers & Settings
Graphics DrivernVIDIA Reference Driver 28.32 WHQL
Chipset DriverIntel INF Update 3.20.1008& Application Accelerator 2.1
DirectX Version8.1
Resolution1024x768, 16 Bit, 85 Hz

Although Windows XP is managing to become established as the standard operating system, the dynamic memory administration is a roadblock when it comes to getting exact benchmark results. In evaluation of memory performance, the subtlest of nuances are also important, therefore we turned to Windows 2000 Professional.

Explanation : the charts show you results that are labeled "Slowest" and "Fastest." The following table shows you the settings we chose :

Act to Precharge57
RAS Precharge23

The differences in the implementation of these three parameters are so small that the benchmarks are not able to give us results that can be interpreted, due to the measurement tolerance. Therefore, we ran all three values with the fastest and the slowest possible settings, each with CL2 and CL2.5.