Intel's Arrow Lake for Desktops and Laptops Will Have Different Instruction Sets
Intel's Arrow Lake S to support new AVX, SHA512, and SM instructions.
It is not uncommon for server processors to support instructions that are not supported by client CPUs. But it looks like Arrow Lake S processors for desktops will support instructions that will not be supported by Arrow Lake CPUs for laptops, as noticed by @InstLatX64.
As it turns out, Arrow Lake processors in LGA1851 packaging will support such instructions as AVX-VNNI-INT16, SHA512, SM3, and SM4. In addition, the CPU will support an LBR Event Logging feature. The exact reasons why Intel decided not to implement these features into mobile parts is unclear, but it is possible that the company could not add support because ultra-low-power x86 cores in the SoC die do not support these instructions and therefore they will not be enabled on the compute die as well.
Meanwhile, the new instructions may actually be missed on the mobile parts. Intel's AVX-VNNI-INT16 are Vector Neural Network Instructions with 16-bit integer data types designed specifically to accelerate convolutional neural network (CNN) and deep learning workloads, which should be quite handy for generative AI applications.
As for other instructions, SHA512, SM3, and SM4 are cryptographic technologies meant to accelerate appropriate algorithms, and given that there are always security concerns, these additions will also be welcome. It should be noted, though, that SM3 and SM4 are primarily used in China.
As far as Intel's Last Branch Record (LBR) feature is concerned, this is a debugging and performance tuning feature supported by some of its processors. LBR keeps a record of the processor's recently executed branches, including addresses of the branch and target instructions. This information helps developers understand program execution flow, identify performance bottlenecks, and analyze speculative execution side-channel attacks like Spectre and Meltdown.
Although mobile Arrow Lake CPUs may not support these instructions supported by desktop versions of these processors, it is likely that eventually, Intel's mobile processors will gain support for things like AVX-VNNI-INT16, SHA512, SM3, and SM4, after more software makers start using them.
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Anton Shilov is a contributing writer at Tom’s Hardware. Over the past couple of decades, he has covered everything from CPUs and GPUs to supercomputers and from modern process technologies and latest fab tools to high-tech industry trends.