Intel's backside power delivery network (PDN) dubbed PowerVia is expected to be one of the main advantages of Intel's upcoming 18A and 20A process technologies. To learn how to implement it and demonstrate its advantages to parties interested in using Intel Foundry Services, the company implemented it in a test chip that is produced on its Intel 4 node, previously known as 7nm.
Intel's experimental chip with backside power delivery is based on unnamed energy-efficient 'E-cores' (we would speculate about Crestmont, though this is an educated guess at the moment) and is implemented on the Intel 4 process technology. Intel's findings, which will be revealed at the 2023 Symposium on VLSI Technology and Circuits, showed that Intel's PowerVia enabled an over 90% standard cell utilization in large portions of the core, while also providing a more than 5% clock speed improvement due to reduced IR drop. An image that Intel is set to demonstrate seems to prove the point, though it is impossible to evaluate how a similar core will behave in real-world workloads.
"Post-silicon debugging was successful, with slightly increased but still acceptable throughput times," a description of the presentation reads. "Moreover, the thermal properties of the PowerVia test chip were in line with the higher power densities anticipated from logic scaling."
Backside PDN aims to separate I/O and power wiring by relocating power rails to the backside of the chip, which helps address issues such as increased via resistances in the back-end-of-line (BEOL). This enhances transistor performance and reduces power consumption, while also eliminating potential interference between data and power connections. In addition, decoupling PDN and data wires contributes to area reduction, potentially leading to higher transistor density compared to existing production nodes.
For now, the only thing that Intel is set to demonstrate in mid-June is that its PowerVia PDN works and can improve frequency as a result of reducing IR. This leads to the conclusion that Intel's next-generation 18A and 20A process technologies will have at least one proven advantage over competing production nodes that will rely on traditional power delivery in the 2024 – 2025 timeframe.
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Anton Shilov is a Freelance News Writer at Tom’s Hardware US. Over the past couple of decades, he has covered everything from CPUs and GPUs to supercomputers and from modern process technologies and latest fab tools to high-tech industry trends.
It kind of looks like the top of a Pentium MMX got the die of a Coppermine chip.Reply
"Backside Power Delivery", AKA Arse Power?Admin said:Intel to describe benefits of PowerVia backside PDN with 4nm-class test chip.
Intel to Show Off E-Core-Based CPU with Backside Power Delivery : Read more
Arm is interested, If TSMC does not have comparative tech, Could see Intel regaining Apple as a customer, albeit as IFS in the future.Reply
This general reader needs more background.Reply
Where is the power routed in current chips?
Is this basically a chip stacking tech - with a power layer being the base ?
What is cell utilization ?
Definitely IFS. I think Intel would have to blow away the competition for a fair amount of time with their own designs if Apple were to give up on their own chips at this point.cyrusfox said:Arm is interested, If TSMC does not have comparative tech, Could see Intel regaining Apple as a customer, albeit as IFS in the future.
It would be about the manufacturing process not the design, ifs is made to be able to handle different designs.JamesJones44 said:Definitely IFS. I think Intel would have to blow away the competition for a fair amount of time with their own designs if Apple were to give up on their own chips at this point.
That's how they work with ARM now to make new ARM CPUs in the first place.
If ifs could handle apples designs and make them better by having better tech then apple could end up using them.
It's a big giant if and I don't think it will happen either but if then it could happen as fast as intel could adapt their fabs to the new designs.
I think IFS would be better off if they split up from Intel's design side and become a Pay for Play Foundary, just like TSMC & GlobalFoundariesReply
A chip that will never be mass produced will show the benefits of a crucial technology.
If they're messing around with Crestmont E-cores, then maybe we'll see a Meteor Lake-N sooner than... 2025?
Give it 2 memory channels this time.
cyrusfox said:Arm is interested, If TSMC does not have comparative tech, Could see Intel regaining Apple as a customer, albeit as IFS in the future.
Sounds like TSMC also has plans for a backdoor...
TSMC Outlines 2nm Plans: N2P Brings Backside Power Delivery in 2026, N2X Added To Roadmap
This article answered some of my questions..Reply
Backside Power Delivery and Bold Bets at Intel