Nvidia, SK Hynix, Samsung and Micron reportedly working on new SOCAMM memory standard for AI PCs
A tiny standard with big AI ambitions.
Nvidia is reportedly teaming up with memory manufacturers SK hynix, Micron and Samsung to create a new memory standard that's both small in size, but big on performance, according to a report via SEDaily.
The new standard, named System On Chip Advanced Memory Module (SOCAMM) is in the works with all three large scale memory makers. The report claims (via machine translation): 'Nvidia and memory companies are currently exchanging SOCAMM prototypes to conduct performance tests'. We could also be seeing the new standard sooner rather than later, adding that 'mass production could be possible as early as later this year'.
The SOCAMM module is suspected to be put into use for Nvidia's next-generation successor to Nvidia's Project Digits AI computers, announced at CES 2025. SOCAMM is expected to be a sizable upgrade over Low-Power Compression Attached Memory Modules (LPCAMM), and traditional DRAM, thanks to several factors.
The first is that SOCAMM is set to be more cost-effective when compared to traditional DRAM that uses the SO-DIMM form-factor. The report further details that SOCAMM may place LPDDR5X memory directly onto the substrate, offering further power efficiency.
Secondly, SOCAMM is reported to feature a significant number of I/O ports when compared to LPCAMM and traditional DRAM modules. SOCAMM has up to 694 I/O ports, outshining LPCAMM's 644, or traditional DRAM's 260.
The new standard is also reported to possess a 'detachable' module, which may offer easy upgradability further down the line. When combined with its small hardware footprint (which SEDaily reports is around the size of adult's middle finger), it is smaller than traditional DRAM modules, which could potentially enhance total capacity.
Finer details about SOCAMM are still firmly shrouded in mystery, as Nvidia appears to be developing the standard without any input from the Joint Electron Device Engineering council (JEDEC).
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This could end up being a big deal, as Nvidia is seemingly venturing out on its own to refine and create a new standard, with the key memory makers in tow. But, SO-DIMM's time in the sun has been ticking for a while, as the CAMM Common Spec was set to supersede it.
The reason as to why that might be is down to the company's focus on AI workloads. Running local AI models demand a large amount of DRAM, and Nvidia would be wise to push for more I/O, capacity and more configurability.
Jensen Huang made it clear at CES 2025 that making AI mainstream is a big focus for the company, though it's not gone without criticism. While Nvidia's initial Project Digits AI computers go on sale in May this year, the advent of SOCAMM may be a good reason for many to wait.
Sayem Ahmed is the Subscription Editor at Tom's Hardware. He covers a broad range of deep dives into hardware, both new and old, including the CPUs, GPUs, and everything else that uses a semiconductor. He has worked as a professional tech journalist since 2015 and has written for Gamespot, IGN, and Dexerto.
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bit_user Reply
LOL, "I/O ports"? I think the word you're reaching for is "electrical contacts" (or just "contacts", for short)! "Pads" would probably also work.The article said:SOCAMM is reported to feature a significant number of I/O ports when compared to LPCAMM and traditional DRAM modules. SOCAMM has up to 694 I/O ports, outshining LPCAMM's 644, or traditional DRAM's 260.
I/O ports have a rather different meaning and I didn't even know what you were talking about, at first.
I hope they're just doing this for time-to-market reasons, and will eventually contribute the spec to JEDEC.The article said:Nvidia appears to be developing the standard without any input from the Joint Electron Device Engineering council (JEDEC).
I'd venture a guess that the key differences are size and bandwidth. Given the size constraints, it seems unlikely to me that it would handle more capacity than LPCAMM, although the diminutive size of SOCAMM might allow for fitting two of them in roughly the same footprint as one SOCAMM.The article said:The reason as to why that might be is down to the company's focus on AI workloads. Running local AI models demand a large amount of DRAM, and Nvidia would be wise to push for more I/O, capacity and more configurability.
I think the size difference probably has a lot to do with this business of mounting the dies directly on the PCB.
Should be interesting. -
DS426 "Finer details about SOCAMM are still firmly shrouded in mystery, as Nvidia appears to be developing the standard without any input from the Joint Electron Device Engineering council (JEDEC)"Reply
How nice, nVidia... -
emerth Thus being backed by nVidia the power supply to the module will be via many individual traces, traces will vary in length, no power conditioning will be installed on the module (not even a cap), there will be no termination on data traces just stubs of copper, and when modules stop working nVidia will blame the owners for not inserting the module correctly.Reply -
Mr Majestyk So yet again the world will be sucked into a proprietary Nvidia standard, that will cost a bomb and no one else will adopt. Hell no.Reply -
thestryker I've seen these half baked articles popping up all over the place. The only thing anyone knows for sure is that it uses LPDDR and is a similar format to CAMM2. Unless they're putting some sort of compute on the module itself (which would limit capacity so I highly doubt it) then the only possible thing they could be doing here is higher bus width. It doesn't seem like the pin difference alone would be enough to increase bus width which would indicate some assignments changing.Reply