Performance Impact of Low Latency DRAM

Graphics Architectures

Many of you may be familiar with my criticism of AGP texturing for high performance systems. AGP texturing is a small scale form of UMA (Unified Memory Architecture). Fundamentally, the goal of UMA is to save dollars on memory in exchange for a some degree of compromise in system performance.

While AGP uses main memory only for textures, full UMA uses main memory for all of graphics related functions. UMA is not for the power user, nor was it ever positioned as a high performance architecture. It is clearly driven by cost, and for the Sub $1K market, UMA can make a lot of sense. The problem is that main memory can get really hammered in UMA systems.

Intel's plans for Whitney (integrating its north bridge with the 740), have inspired many of the chip set vendors and graphics chip vendors to begin looking at similar integration projects. Whitney will probably not be a full UMA architecture, but many of the competing products will be UMA.

For UMA systems, standard DRAM performance may be adequate for some systems, UMA platforms will need a broader range of DRAM performance options in order to satisfy large portions of the market. With adequate memory performance, UMA systems could become a very cost-effective way to build a low cost midrange system as well. I am speaking from the perspective of an OEM, not as an individual power junkie.

Of course, OEMs and chip vendors must make difficult decisions on the "bandwidth vs. latency" question. The key here lies in the concept of "Randomness". DRAM accesses from a cached CPU are very random and benefit more from latency improvements than bandwidth improvements. Also, 3D graphics controllers demonstrate very random behavior as they jump from place to place in memory for texture reads, pixel writes, z-buffer reads and writes, CRT scanning, etc.

When running 3D graphics applications on a UMA system, CPU activity is interleaved with graphics controller activity - driving randomness to an extreme. As a result, the page miss rate becomes even higher. In these systems, page miss latency can make or break the system.