ASML has previously revealed that its next-generation High-NA extreme ultraviolet (EUV) chipmaking tool would cost over twice as much as its existing Low-NA EUV lithography tools, but didn't provide specifics. Now ASML has revealed that its High-NA Twinscan EXE lithography machines will cost around $380 million (€350 million), reports Taipei Times. In contrast, existing Low-NA Twinscan NXE EUV systems cost around €170 million ($183 million), though their prices depend on exact models and configurations. Additionally, ASML told Reuters that it has taken "10 to 20" orders to date from companies, including Intel and SK hynix, and plans to build 20 per year by 2028.
ASML's High-NA Twinscan EXE litho tools represent a pinnacle of the company's technology. Each device weighs 150,000 kilograms and takes 250 crates to transport; then it takes six months and 250 engineers to assemble a single tool.
ASML's forthcoming High-NA EUV Twinscan EXE tool is poised to deliver an 8nm resolution, significantly improving existing Low-NA EUV scanners that can only reach 13nm with a single exposure. This allows for transistors that are approximately 1.7 times smaller, leading to a nearly threefold increase in transistor density. The ability to attain 8nm critical dimensions is vital for manufacturing chips with sub-3nm process technologies, a goal the industry aims to reach between 2025 and 2026.
While Low-NA lithography systems can match this resolution and transistor density, they require a more expensive and complex double-exposure technique known as double patterning. Adopting High-NA EUV technology is expected to eliminate the need for EUV double patterning, streamline production, potentially enhance yields, and lower expenses.
However, this advancement also introduces significant challenges, as High-NA EUV tools are more expensive and feature a halved imaging field, which requires a rethink of chip designs. Also, the new High-NA EUV lithography systems are significantly larger than Low-NA EUV systems, requiring chipmakers to rethink their fab configurations.
To that end, different chipmakers have different plans for deploying High-NA EUV machines. While Intel plans to use High-NA EUV tools with its post-18A (1.8nm-class) process technology, TSMC is said to be adopting a more cautious approach and using the tech for its 1nm-class node sometime in 2030, but the company hasn't confirmed its exact timeline.
