AMD Fusion: Brazos Platform
During August’s Hot Chips discussion, AMD revealed information about two APUs: Llano and Ontario. We already know that the first generation of Bulldozer-powered processors won’t be APUs. Roughly two weeks later, AMD unvieled Zacate, which fills the gap between Llano and Ontario. Zacate is basically identical to Ontario (manufactured at 40 nm, armed with DX11-class graphics, fixed-function UVD for video playback, and dual low-power Bobcat cores). It is the second of two new x86 architectures and is aimed at the low-power, ultrathin notebook and netbook spaces.
The Brazos platform consists of either APU: Ontario or Zacate. Brazos is intended for the low-end of the mobile spectrum, where AMD has predominately lagged behind Intel ever since Atom was introduced. AMD is specifically targeting users that instant message, word process, Web-browse, email, watch video, and maybe engage in some casual mainstream gaming.
Zacate, in particular, is aimed at Intel’s more entry-level CULV Pentiums, cheaper Celeron offerings, and premium Atom-based configurations. Just think about systems priced from $399 to $500. Meanwhile, Ontario will go head-to-head with more budget-focused Atom-based systems. And even though Ontario uses 1 W more than Intel's single-core Atom, rated for up to 8 W, it is supposed to include a more potent graphics bite than Intel’s decidedly mediocre GMA 3150. Discrete GPUs are still an option, but they hook directly into the APU by way of a four-lane PCIe link.
Technically, the Ontario/Zacate APU is only one half of the Brazos platform. The other half is the SB750 southbridge (codenamed "Hudson," a derivative of the SB800). The SB750 connects via AMD’s proprietary UMI (Unified Media Interface) interconnect. Details on that interface are still forthcoming. We should point out that, unlike earlier reports, there is no native USB 3.0 support.
The Brazos architectural overview provides a few more details. Notice that AMD is making a point to differentiate between a first-gen and second-gen implementation of the Brazos platform, the latter of which looks to include more PCI Express connectivity.
For netbooks, AMD's configuration combines a SB750 southbridge with a Ontario. Since the wireless device is directly hooked up to the APU's single PCIe link, there are improvements in power management, as the southbridge can go into an idle state without sacrificing connectivity.
For notebooks, the plan is to pair a SB750 southbridge with an Ontario or Zacate, with the additional use of a four-lane PCIe connection to a discrete GPU. However, this sacrifices some power management savings by hooking the wireless device to the southbridge. AMD's logic is that in a netbook, users would be less likely to need a discrete graphic solution. By moving wireless connectivity up to the APU, the southbridge only needs to deal with I/O devices like the keyboard, touchpad, USB devices, and flash media. Given that mobile users are less likely to use USB devices and flash media while on the road, the SB750 only has to transfer small bits of data from the keyboard and touchpad, which translates into higher power savings.
Everyone can benefit from power savings, and in a world where we leave our wireless connection active, the ideal situation would be to always have the wireless device hooked directly into the APU. However, this is not possible if you are using a discrete graphic solution in a x4 configuration. Remember, there are five PCIe controllers off the APU, and one is reserved for the UMI link. The other four are intended for peripherals. For discrete graphics, you can either use a single x1, x2, or x4. So in practice, it is possible to connect a discrete graphics chip with x2 and still simultaneously have two x1 connections available. Meanwhile, all "Hudson-M1" southbridges come with a UMI connection to the APU (Ontario/Zacate) that is based on a single x4 PCIe connection; probably with some aspect of proprietary signal handling.
It isn't quite clear in the diagrams, but we should point out that PCIe 1.0 and PCIe 2.0 are simply implementation blueprints. An Ontario APU armed with first-gen PCIe doesn't differ at the hardware level from an Ontario APU running second-gen PCIe signaling. According to AMD, the chips are from the same yield process, so this PCIe 1.0 versus 2.0 configuration is implemented at the BIOS level. This means that all PCIe connections on the Brazos platform are PCIe 1.0- and 2.0-capable. It is up the the system integrator to choose the implmentation.
