AMD decided in favor of the integrated memory interface in the CPU to ensure it can work at full processor speed, and attain a far higher bandwidth than is possible with a Northbridge interface connected via a slow bus. That was the theory anyway. This worked like a dream with Socket 939 and DDR memory; at a CPU clock speed of between 2 GHz (Athlon 64 X2 3200+) and 2.8 GHz (Athlon 64 FX-57), read and write speeds from memory hardly fluctuated at all.

To analyze bandwidth synthetically, we used Version 2.80.575 Beta of the Everest diagnostics program. The values returned by the program are very stable, even after several runs, and are not distorted by dual-core CPUs and hyperthreading.

Read Performance

The read speed of DDR2 compared to original DDR1 memory. DDR2 memory only drops off at high clock speeds, if at all.

With the DDR2 memory interface, the reality no longer matches the theory: data transfer rates fluctuate between 6.4 and 8.1 GB/sec when reading, at the same CPU clock speeds as the foregoing DDR1 comparison. The variance is almost 21%.

Only at clock speeds of 2.6 GHz and above does memory interface performance improve. That's because of the poor CAS latency (CL4.0) of DDR2 memory with a high data throughput, compared to DDR1 (CL2.0). Here the Athlon 64 X2 5000+ (2.6 GHz) achieves a value of 7.6 GB/sec, with the Athlon 64 FX-62 at 2.8 GHz scoring a top throughput of 8.1 GB/sec.