Briertown Mixed Signal IC
Briertown may seem like the extra wheel of the Moorestown platform, but its role is critical for Intel hitting the necessary power targets. There is no one official Briertown design. Rather, Briertown is an architecture specification for peripheral support and power delivery, including battery charging now managed by hardware instead of software. Look at Briertown on a Moorestown motherboard and you’ll see that it’s considerably larger than the CPU and chipset combined. Despite this, Briertown requires almost half as many components and consumes about one-third the board area as the equivalent power delivery circuitry on Menlow platforms. Not surprising, Briertown also costs about one-third the price of its predecessor.
The MSIC is part of what makes Moorestown’s power gating possible. The Briertown complex runs multiple voltage rails to the CPU and chipset, all of which can be controlled by the operating system. Without this, there couldn’t be Lincroft’s Burst Mode because Briertown is what enables those lightning-quick transitions in and out of the various C- and S0ix-states.
Briertown manages device and subsystem power delivery at the system level, each of which get integrated as “jellybeans” within the larger complex in order to keep management more granular. For example, the TPM block occuplies about 6 x 6 mm and consumes up to 85mW. The USB OTG block from Philips measures 20 x 14 mm, consuming about 300mW, and the 2MP USB camera chip from ST Micro measures 7 x 8 mm and draws roughly 400mW.
One can wonder if the Moorestown devices we see at mid-year will be as power-efficient as the knock-off brands and designs we’re likely to see several months later. Intel was emphatic about the fact that when it comes to its new power states, hardware management technologies, and Briertown design, there is no room for flexibility. The platform must hit certain minimum performance levels, and Intel isn’t willing to compromise on this. We may see more “cost-effective” products creep into ODM designs over time, but it won’t be from modification of Intel’s core platform. How much impact future OEM corner-cutting will have on final power and performance levels remains to be seen.
