3D-Printed Bare-Die Liquid Chip Coolers Smash Barriers, up to 3.5X Improvement

A series of 3D-printed processor coolers were one of the most interesting presentations at ITF World, a conference hosted by chip research giant imec in Antwerp, Belgium. These prototype waterblocks boost the ability to cool dense processors, like CPUs and GPUs, by up to 3.5X over the kinds of solution we see in the best CPU coolers today, thus enabling higher power density and unlocking untapped performance in modern chips. The results of this research could lead to radical new watercoolers for all sorts of chips.

Bare-die cooling that forces liquid directly over the processor die is emerging as one of the most obvious steps forward to deal with the excess heat generated by newer chips, and imec is leading the way with new techniques to unlock the full performance of the densest process nodes. That's becoming more important with each new generation of chips as power consumption skyrockets due to the diminishing power reduction scaling with smaller nodes. Additionally, smaller transistors push power density higher, complicating cooling efforts and ultimately restricting chip performance.

The ultimate goal for chip designers is to get more work done in a smaller space. Still, today's chips are already power-constrained, and areas of 'dark silicon' are turned off while the chip is operating to remain within certain TDP and temperature limits. That means most chips use only part of their potential during normal operation. Moreover, the problem is only intensifying with each generation of chips — modern CPUs like AMD's Epyc Genoa already top out at 400W, and roadmaps point to 600W server chips in the future.

In contrast to the standard watercooling approaches that use a self-contained waterblock that has a cold plate mated with a chip heatspreader to cool the processor, the prototype 3D-printed coolers pictured in the album below force liquid directly over the bare processor die, thus improving cooling capabilities by pumping coolant directly to the surface of the processor.

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The 3D-printed waterblocks allow rapid prototyping, and imec uses different types of standard polymers used in 3D printing to ensure the waterblocks can handle the temperature loads. It's unclear if one could print these designs on one of the best 3D printers.

The 3D-printed waterblocks can be customized in several different ways, with custom nozzles arrays (you can see these in the images) blasting liquid directly onto the chip surface in targeted areas, such as directly over individual cores or high-heat-generating areas of the chip used for vector operations, to improve cooling capabilities. 

The waterblocks are also custom-fit to consume the least amount of space possible and currently use an O-Ring to prevent liquid seepage from around the waterblock. Naturally, imec is experimenting with several different types of sealing mechanisms and different types of 3D printing materials for the blocks.

Nearly any dielectric liquid can be used with these coolers, such as treated water or refrigerants. Naturally, even though the liquid isn't conductive, bare-die liquid cooling requires sealing the areas around the chip, such as capacitors and other electronic circuitry on the PCB. However, to keep the coolant as close to the chip as possible, the top of the die has no sealant whatsoever. The researchers pump the liquid directly over the smooth die surface, but other approaches, like adding striations to the top of the die, can unlock even more cooling performance.

Sealants pose long-term reliability challenges due to rapid thermal cycling and interactions with the various coolants used in the system. Still, imec is methodically working to find the right mix of all materials to ensure long-term reliability.

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The above album contains several slides outlining the researcher's experiments. In general, cooling more than 100W of power per square centimeter has proven incredibly problematic, leading to a general rule of thumb that spreading 1W of power over 1 square MM of silicon allows for effective cooling. Power density is skyrocketing with smaller process nodes, though, so increasing the ability to remove heat from higher power concentrations is paramount to continue unlocking extra performance.

Remember, more power consumption often equates to more chip performance (there are caveats — efficiency can suffer). The imec researchers tell us they can cool as much as 1,000W in a single square centimeter (100W per mm^2), or even up to 500W in a single mm^2, but that type of cooling performance isn't representative of typical performance because it doesn't scale well to an entire chip.

In common applications, these chip coolers could enable up to 350W of cooling capacity per square centimeter, or about 3.5W per mm^2 — a 3.5X increase over what is commonly seen today. As shown in the album above, this will allow chip designers to continue to push the limits of performance with a comparably more conservative method than the single- and two-phase cooling solutions that would be required to extend beyond 4W per mm^2.

Naturally, this is a simplistic view of how these cooling solutions would perform, with many other variables, such as temperature deltas and other factors, being required to measure the various merits of the approach properly. However, one thing is certain — this approach marks one of the easiest ways to boost cooling capabilities with a reasonable amount of increased cost. Other techniques, such as the TSMC research that proposes pumping coolant through microchannels inside the chip itself, are obviously far more exotic and thus costly and further out on the horizon.

Imec's efforts are still in the research phase as the researchers work on identifying the correct materials, liquids, and designs that will allow the creation of mass-produced cooling solutions, with the earliest products of this research likely taking five years before they filter out to market.