AMD has some big news to announce in the data center market, although the big event isn’t scheduled until November 8th. At that time, the company says that it will reveal its latest innovations with its EPYC processor and Instinct accelerator product families.
AMD CEO Dr. Lisa Su will head the virtual event alongside Forrest Norrod (SVP and GM for Data Center and Embedded Solutions Business Group) and Dan McNamara (SVP and GM for the Server Business Unit). Understandably, AMD doesn’t want to reveal its hand two weeks out from its big announcement, but we have a general idea of what the company might reveal to the public.
Regarding its Epyc processor family, the consensus is that AMD will launch its Milan-X processor family, which are drop-in replacements for its current-generation server platforms. New Milan-X SKUs are an extension of the existing Epyc 7003 product family and incorporate AMD’s highly anticipated 3D V-Cache chip stacking technology. With the Milan-X family, we’re looking at 3D V-Cache providing up to an additional 512MB of L3 cache in addition to the current 256MB maximum.
According to previous leaks, the new flagship offering will be the Epyc 7773x with a 64-core/128-thread design with a base clock of 2.2GHz, boost clock of 3.5GHz, 280W TDP, and 768MB of total L3 cache (including 3D V-Cache). Zones recently listed the Epyc 7773x with a price tag of $10,746.99 compared to $9,424.99 for the existing Epyc 7763. Below is a list of the rumored Milan-X Epyc 7003 processor family:
| Processor | Cores/Threads | Base Clock | Boost Clock | TDP | L3 Cache (L3 + 3D V-Cache) |
| Epyc 7773X | 64/128 | 2.2 GHz | 3.5 GHz | 280 W | 768 MB |
| Epyc 7573X | 32/64 | 2.8 GHz | 3.6 GHz | 280 W | 768 MB |
| Epyc 7473X | 24/48 | 2.8 GHz | 3.7 GHz | 240 W | 768 MB |
| Epyc 7373X | 16/32 | 3.05 GHz | 3.8 GHz | 240 W | 768 MB |
Moving on to the Instinct family, AMD will reportedly launch its Instinct MI200 family based on CDNA 2 (Aldebaran) architecture. We’re reportedly gearing up to see products supporting up to 128GB of HBM2E memory.
Recent rumors have suggested that there will be two SKUs – MI250 and MI250X – with the latter featuring 110 CUs per die (2x MCM = 220 CUs), a 1.7GHz boost clock, and a 500W TDP using TSMC’s enhanced 7nm process node.
AMD’s “Data Center Premiere Virtual Event” takes place November 8th at 11 am ET; you can catch the livestream at the following link.
