Asus recently ushered in new firmware for the RS700A-E9-RS12V2 1U server that adds support for a couple of previously unknown Epyc (codenamed Rome) processors. Twitter user @momomo_us first spotted the document.
Just like any other chip that belongs to the Epyc 7002 Series family, codenamed Rome, these processors use the latest Zen 2 microarchitecture and are manufactured at TSMC under the 7nm FinFET process node. They support eight channels of DDR4 RAM and provide up to 128 high-speed PCIe 4.0 lanes.
Starting from the top, the Epyc 7662 will apparently join the the Epyc 7H12, 7742, 7702 and 7702P. If the model name is any indication, the Epyc 7662 should fall behind the Epyc 7702. The 64-core chip has 256MB of L3 cache, a 2 GHz base clock and 200W TDP (thermal design power).
It appears that AMD is also readying another 32-core Epyc chip for server customers. Asus listed the Epyc 7532 with a 2.4 GHz base clock and 200W TDP. It should slot in between the Epyc 7542 and 7502. However, the Epyc 7532's biggest appeal is in its L3 cache. While other 32-core parts, such as the Epyc 7542, 7502 and 7452 are limited to 128MB of L3 cache, the Epyc 7532 seems to have 256MB at its disposal.
AMD Epyc Rome Specs
| EPYC Rome SKUs | Cores / Threads | Base / Boost (GHz) | L3 Cache (MB) | TDP (W) | 1K Unit Price |
|---|---|---|---|---|---|
| 7H12 | 64 / 128 | 2.60 / 3.30 | 256 | 280 | ? |
| 7742 | 64 / 128 | 2.25 / 3.40 | 256 | 225 | $6,950 |
| 7702 | 64 / 128 | 2.00 / 3.35 | 256 | 200 | $6,450 |
| 7662* | 64 / 128 | 2.00 / ? | 256 | 200 | ? |
| 7642 | 48 / 96 | 2.30 / 3.20 | 256 | 225 | $4,775 |
| 7552 | 48 / 96 | 2.20 / 3.30 | 192 | 200 | $4,025 |
| 7542 | 32 / 64 | 2.90 / 3.40 | 128 | 225 | $3,400 |
| 7532* | 32 / 64 | 2.40 / ? | 256 | 200 | ? |
| 7502 | 32 / 64 | 2.50 / 3.35 | 128 | 180 | $2,600 |
| 7452 | 32 / 64 | 2.35 / 3.35 | 128 | 155 | $2,025 |
| 7402 | 24 / 48 | 2.80 / 3.35 | 128 | 180 | $1,783 |
| 7352 | 24 / 48 | 2.30 / 3.20 | 128 | 155 | $1,350 |
| 7F52* | 16 / 32 | 3.50 / ? | 256 | 240 | ? |
| 7302 | 16 / 32 | 3.00 / 3.30 | 128 | 155 | $978 |
| 7282 | 16 / 32 | 2.80 / 3.20 | 64 | 120 | $650 |
| 7272 | 12 / 24 | 2.60 / 3.20 | 64 | 120 | $625 |
| 7F32* | 8 / 16 | 3.70 / ? | 128 | 180 | ? |
| 7262 | 8 / 16 | 3.20 / 3.40 | 128 | 155 | $575 |
| 7252 | 8 / 16 | 3.10 / 3.20 | 64 | 120 | $475 |
| Single-Socket SKUs | |||||
| 7702P | 64 / 128 | 2.00 / 3.35 | 256 | 200 | $4,425 |
| 7502P | 32 / 64 | 2.50 / 3.35 | 128 | 180 | $2,300 |
| 7402P | 24 / 48 | 2.80 / 3.35 | 128 | 180 | $1,250 |
| 7302P | 16 / 32 | 3.00 / 3.3 | 128 | 155 | $825 |
| 7232P | 8 / 16 | 2.80 / 3.2 | 32 | 120 | $450 |
*Specifications are unconfirmed.
It's interesting to see AMD continuing to concentrate on Epyc processors with lower core counts. The new offerings should come in handy, considering VMWare is charging double the licensing fees for Epyc parts with more than 32 cores. Coincidentally, Intel is reportedly preparing its next wave of rewarmed Cascade Lake Xeon processors to hold off AMD's Epyc army.
The Epyc 7F52 is an interesting part. The 16-core processor features a 3.5 GHz base clock and 240W TDP, the highest out of all the 16-core SKUs. According to Asus' document, the Epyc 7F52 has the same amount of L3 cache as the Epyc 7532. The Epyc 7302, which is currently thefastest 16-core model, has a 128MB L3 cache. The new Epyc 7F52 doubles that.
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Asus also mentions the Epyc 7F32. With a 3.7 GHz base clock, it will be the fastest eight-core processor in the Epyc 7002 Series product stack. The chip has a 180W TDP, but sadly the L3 cache remains at 128MB.
The firmware that supports the four unannounced Epyc processors is already out, so they should be available very soon. U.S. retailer Bottom Line Telecommunications already listed the EPYC 7662 and 7532 for $6,653.81 and $3,634.77, respectively.
Zhiye Liu is a news editor, memory reviewer, and SSD tester at Tom’s Hardware. Although he loves everything that’s hardware, he has a soft spot for CPUs, GPUs, and RAM.
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Gillerer ReplyAsus also mentions the Epyc 7F32. With a 3.7 GHz base clock, it will be the fastest eight-core processor in the Epyc 7002 Series product stack. The chip has a 180W TDP, but sadly the L3 cache remains at 128MB.
If you did any analysis at all, you'd realize that:
AMD enables cores symmetrically across all CCDs and CCXs
every CCX on the same CPU will have the same number (either 1, 2, 3 or 4 cores)
double that for: each CCD (=compute die) will have an even number of cores (2, 4, 6 or 8)Then for L3 cache:
each CCD has 32MB L3 cache, split 2×16MB between the two CCXes
256MB L3 cache parts therefore must have the full complement of 8 CCDs, while 128MB L3 parts can do with 4 CCDsConclusion:
a 8-core EPYC CPU can only utilize 4 CCDs, because both CCXes on each have to have 1 core enabled: 1 per CCX ⇒ 2 per CCD ⇒ 8 per 4 CCD
AMD can't produce a 256MB L3 8-core part with the current division of CCD into two CCXes