Intel's $16.7 billion Altera purchase in late 2015 signaled a shift in the company's strategy to increase its capabilities in several core areas. The acquisition has now borne fruit in the form of the new Stratix 10 FPGA, which surprisingly wields a quad-core ARM Cortex-A53 processor and a dollop of HBM2 memory that offers up to 1TBps of memory bandwidth.
CPUs and FPGAs have slugged it out in several categories as the go-to solutions for high-performance applications, and each has its own advantages. CPUs can perform a wide range of operations and fit into just about any mold, whereas FPGAs have evolved into highly specialized chips that offer power versus performance advantages in targeted applications. CPUs hold the simplicity advantage, as FPGAs require specialized programming to unlock their true potential.
For Intel, bringing Altera into the fold will allow it to grab a slice of the broader FPGA pie while simultaneously infusing FPGAs on-package with its own Xeon products, such as the forthcoming Purley platform. Of course, the broader initiative is to bring FPGAs on-die with the CPU, but the road map for that achievement is cloudy. Intel also has its Xeon Phi line, which provides the company with a diverse stable of products.
The Stratix 10 steps into the ranks with up to 10TFLOPS of single-precision floating DSP performance. Four on-package HBM2 components feed the beast with up to 1TBps of memory bandwidth. Intel claims the Stratix 10 offers up to 70% lower power consumption than Altera's previous-generation Stratix V when normalized for performance. At the end of the day, the goal of all compute solutions is to provide the most performance in as dense a package as possible, and Intel claims to have that wrapped up with 5x the density and 2x the core performance of the previous-generation products.
Much of the performance enhancement is borne on the back of the increase to 5.5 million logic elements, which is a significant advantage over the competing Xilinx XCVU13P, which features 3.78 million logic elements. Intel and Altera also noted that the Stratix 10 could be reprogrammed in milliseconds, which is a key requirement for on-the-fly repurposing.
Surprisingly, the Stratix 10 SoC also features an embedded quad-core 64-bit ARM Cortex-A53 processor (up to 1.5 GHz); one would have imagined that Intel would bring its own Atom processors into the mix. Much ink has been spilled on the ARM and Intel wars, so the Cortex-A53's presence on the Stratix 10 SoC is an interesting development. Business makes for strange bedfellows; it's likely that the Stratix 10 was already well under development when Intel purchased Altera, which means we might see the switch to x86 processors in future Altera FPGAs.
Most acquisitions (well, at least the good ones) provide both companies with tangible assets that promote their existing technologies. Altera made its quasi-debut as an Intel company when it presented at IDF 2016 in August. During the session, company representatives hailed the access to Intel's semiconductor prowess and processes as a key win that will allow Altera to accelerate its own developmental process. The new Stratix 10 serves as a good example of that collaboration, as Intel built it on its own second-generation 14nm 3D tri-gate process (this likely denotes the 14nm+ process). Intel also brings a wealth of engineering talent to the table. The new Stratix 10 features a "revolutionary" new HyperFlex architecture, which provides additional performance and power efficiency by streamlining the registers (Hyper-Register), enhanced core clocking (localized clock trees that reduce skewing), and Hyper-Aware design flow (a "Fast Forward Compile tool").
Microsoft recently announced that it's using FPGAs as the bedrock of several facets of its cloud and Bing infrastructure. The move is largely due to FPGA reprogrammability, which allows data centers to alter their use case on the fly, and there are several large data center operators that will serve as tasty targets for Intel's latest FPGAs. The fusion of on-die FPGAs with Xeon CPUs will bring forth perhaps the greatest advantages in terms of flexibility, which means that Intel could also use the Altera FPGA architecture as a stepping stone into new segments, like the burgeoning machine learning market.