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Intel Tapes In 7nm Meteor Lake Compute Tile

Intel 10nm Wafer
(Image credit: Intel)

Intel CEO Pat Gelsinger announced at the J.P. Morgan Global TMC Week event today that the company has "taped-in" the compute tiles for its new 7nm Meteor Lake chips, meaning that the design elements and IP have been validated for integration into the broader SoC. The design will be ready for "tape-out" after further SoC validation, which is when it will be readied to be sent to the foundry for production.

Gelsinger's comments came in the context of the company's ongoing work with its 7nm process node. "We've got past some of the stumbles at 10 and now 7, and the daily updates that we're getting on wafers coming out of fab, the full embrace of EUV, we're very confident that we have that back on track. In fact, right now, we're taping out the compute tile, the Meteor Lake compute tile, is finishing tape-in as we speak," Gelsinger said. 

Gelsinger's statement does seem to mix terms a bit, which he corrected by stating that the chip is still in tape in. He also tweeted an announcement confirming the tape in, which is right on schedule as the company had previously announced that tape-in would happen in Q2 of this year. 

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The Meteor Lake processors are built on Intel's 7nm process and feature the company's Foveros design. This technology allows for die-on-die logic stacking to fabricate 3D processors, as we see with Intel's Lakefield chips.

Intel has acknowledged that it will outsource some of its core logic to TSMC for its "leadership" CPUs in 2023.  Meteor Lake's 3D design could allow Intel to either use its own 7nm cores or swap in cores based on a process node sourced from a third-party foundry, like TSMC, for faster versions of the chip.

Intel hasn't shared any details about its outsourcing strategy yet, but 7nm Meteor Lake will contend with competing chips in the same time frame from the likes of AMD and others that will come with TSMC's 3nm process. That makes higher-end chips a necessity for Intel to remain competitive, but it remains to be seen if those will come as TSMC-infused versions of Meteor Lake, or another chip design entirely. 

Meteor Lake chips are thought to come with a combination of Intel's Ocean Cove and Gracemont cores, meaning they'll follow the same hybrid arrangement found in Alder Lake, but in a 3D-stacked fashion. intel is already well underway in the design process, as Meteor Lake enablement code has already landed in Linux patches. We'll learn more as the chips work their way to market in 2023. 

  • JayNor
    "now 7, and the daily updates that we're getting on wafers coming out of fab, the full embrace of EUV, we're very confident that we have that back on track. In fact, right now, we're taping out the compute tile, the Meteor Lake compute tile,"

    with the context of those two statements, and reading for comprehension, one can infer that the Meteor Lake compute tiles are being built on Intel 7nm process.
    Reply
  • JayNor
    "..That makes higher-end chips a necessity for Intel to remain competitive.."

    in the next paragraph the article mentions that Meteor Lake will be built with 3D Foveros. When will the competition designs catch up? Intel built Lakefield with Foveros 3D in 2018.
    Reply
  • hotaru.hino
    JayNor said:
    When will the competition designs catch up? Intel built Lakefield with Foveros 3D in 2018.
    They'll catch up when they think it's necessary to employ such a design. It's not like Foveros is the only technique of its type floating around.
    Reply
  • InvalidError
    hotaru.hino said:
    They'll catch up when they think it's necessary to employ such a design. It's not like Foveros is the only technique of its type floating around.
    It may not be the only one, but it is the most complex scheme so far.
    Reply