AMD unwraps Ryzen AI 300 series ‘Strix Point’ processors — 50 TOPS of AI performance, Zen 5c density cores come to Ryzen 9 for the first time

AMD Computex 2024
(Image credit: Tom's Hardware)

AMD unwrapped its new Ryzen AI 300 series, codenamed Strix Point, today at Computex 2024 here in Taipei, Taiwan, with the new chips featuring the new Zen 5 CPU microarchitecture with two types of cores, an upgraded RDNA 3.5 graphics engine, and of course, AMD’s new XDNA 2 engine that enables running AI workloads locally. AMD’s new branding scheme now brings ‘AI’ right into the name of the chip, reflecting the company’s strong focus on its new AI-focused XDNA 2 neural processing unit (NPU) that now offers 50 TOPS of performance, a 5X gain for the third generation of AMD’s AI processors. This level of performance beats all other chips for Windows PCs, including Qualcomm’s promising Snapdragon X Elite. It easily exceeds Microsoft’s 40 TOPS requirement for next-gen AI PCs, allowing Copilot elements to run locally.

AMD has plenty of other advances under the hood, too, with a move to 12-core Zen 5 processors for thin-and-light and ultralight notebooks that used to be limited to eight CPU cores and up to 16 compute units for the new RDNA 3.5 integrated graphics engine, an increase over the previous-gen’s maximum of 12 CUs.

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Paul Alcorn
Editor-in-Chief

Paul Alcorn is the Editor-in-Chief for Tom's Hardware US. He also writes news and reviews on CPUs, storage, and enterprise hardware.

  • usertests
    Lisa Su just mentioned the NPU die area. :sweatsmile: Cue the complaining.
    Reply
  • Notton
    Oh look, it turns out all the rumors were true
    300, so it's 100 more than Intel's 200
    New naming scheme, but mixed into the older naming scheme
    yay:rolleyes:
    Reply
  • cknobman
    We dont have AI, its the biggest scam there is.
    We have algorithms that learn what we teach them, then can either repeat or formulate responses based on what we teach it it.

    It mimics patterns.

    True AI would be able to make decisions on what its begin taught. AI would be able to decide for itself if what it is being taught is right or wrong, correct or incorrect.

    Right now you can "teach" AI whatever you want because its not intelligent, its just a pattern recognizer and repeater.
    Reply
  • peachpuff
    cknobman said:

    True AI would be able to make decisions on what its begin taught. AI would be able to decide for itself if what it is being taught is right or wrong, correct or incorrect.
    Don't be such a party pooper... googles ai is telling you to put glue on your pizza so you better put it on your pizza!
    Reply
  • genz
    cknobman said:
    We dont have AI, its the biggest scam there is.
    We have algorithms that learn what we teach them, then can either repeat or formulate responses based on what we teach it it.

    It mimics patterns.

    True AI would be able to make decisions on what its begin taught. AI would be able to decide for itself if what it is being taught is right or wrong, correct or incorrect.

    Right now you can "teach" AI whatever you want because its not intelligent, its just a pattern recognizer and repeater.
    Alright.

    So how are we able to make decisions on what we were taught without past experience, self-taught or transferred?

    People forget how much of human intelligence isn't actually there when we are born.
    Reply
  • KnightShadey
    cknobman said:
    We dont have AI, its the biggest scam there is.

    Next thing you're gonna tell us is that AR & VR Aren't REAL !! 😱 🤯

    Would calling it something like an "Algorithmic Inferencing' machine help you with the PR Marketing bits they use for selling it to the plebes ? 🤨 😜

    PS, wait 'til ya' find out there's no actual Thunder in Thunderbolt hardware. 🤪
    Reply
  • KnightShadey
    Admin said:
    AMD unwrapped its new Ryzen AI 300 series, codenamed Strix Point, today at Computex... ..AMD’s new XDNA 2 engine that enables running AI workloads locally.

    While it's a nice bump and promising (especially the option for 3 discrete workloads across CPU/NPU + iGPU + dGPU), it would've been far more impressive if the true 9 series HX platforms had been showcased with proper memory sized and better GPU option (with more VRAM). Especially since 12/24 still likely loses in most work/workstation scenarios to the 7945HX's 16/32 , which also didn't get a refresh when the 8040 series came out.

    However, it should give us an idea of how Strix Halo could do with twice the memory bandwidth and 2.5x the CUs plus add 32MB local MALL cache (might help make up for PCie 4 vs 5) as a starting point... all before putting a capable GPU in there.

    321 total TOPs for an R9 AI 370 HX + nV 4070 is OK , but as they say... twice (or thrice) as much for twice the price is Real Nice. 😎

    Entertaining that ASUS early launch material highlights "45 TOPS NPU" for it's TUF A16 platform instead of 50....
    ibb (dot) co/7NmV53V

    Did that evolve since they put that slide together or just a Qualcomm type Typo? 🧐
    Reply
  • bit_user
    The article said:
    Block BF16, a new data format that provides the full accuracy of FP16 with many of the same compute and memory characteristics of INT8. AMD says Block FP16 is plug-and-play; it doesn’t require quantizing, tuning, or retraining the existing models.
    My guess is that it's basically like texture compression. I've heard of mobile NPUs using compression on the weights, but not really seen AMD or Nvidia talk about it (other than handling a limited degree of sparseness). It always seemed to me like a natural thing for GPUs to do, given their texture units are already in the datapath and already have hardware support for texture compression. ...except this isn't a GPU!

    The article said:
    It isn’t yet clear if Block FP16 is certified as an IEEE standard.
    No. ...I'm 99.9% sure it's not.

    But, that's irrelevant if it's basically invisible to software, as they claim. The main reason for IEEE standards is to have some consistency between hardware implementations, so that software doesn't have to introduce a ton of special cases, one for each hardware implementation.
    Reply
  • JayNor
    "AMD hasn’t yet shared the full TOPS rating for its chips with the CPU and GPU added in."

    why not?
    Reply
  • KnightShadey
    bit_user said:
    My guess is that it's basically like texture compression. I've heard of mobile NPUs using compression on the weights, but not really seen AMD or Nvidia talk about it (other than handling a limited degree of sparseness). It always seemed to me like a natural thing for GPUs to do, given their texture units are already in the datapath and already have hardware support for texture compression. ...except this isn't a GPU!


    No. ...I'm 99.9% sure it's not.

    But, that's irrelevant if it's basically invisible to software, as they claim. The main reason for IEEE standards is to have some consistency between hardware implementations, so that software doesn't have to introduce a ton of special cases, for each hardware implementation.

    Yeah, could be, but I'm doubtful because it seems like a stumbling block scaling size & speed long term.

    I got the feeling it was more like how BFloat16 (the other B16 🤓 ) deals with FP32 for rounding up/down, so it just becomes an 'efficient'/elegant math work around, that can be used in any scenario, rather than adding silicon for de/compression, but that's just my take/guess on it.

    It's something I wish they spent more time on, but I suspect we'll get that in the deep dives in the coming day/weeks before launch.

    My initial read on it was to react "OH, this is how AMD is going to react to not having intel's AVX FP16 support" which of course is helpful for Ai workloads.

    Who knows it may be the best of both worlds giving them speed down low for consumer Ai applications/platforms, which are definitely more about doing 95% of the job in 1/3 the time rather than speed up the full-fat FP16/32 by 20-50% (usually closer to 10% because at that level you are still heavily memory bound/restricted ). 🤔🤷🏻‍♂️

    Too me BFP16 like adding a small turbo to a small engine in a light sports car (Lotus 7) .... boom huge impact , while FP16 is like adding another turbo to a Chiron... OK, improvement, but not dramatic, and not where the majority of the market will be for Copilot+ level Ai PCs for the next coupla years.

    The more precise faster seems like still the domain of commercial applications.... (where dedicated racks of precision are still telling people to eat rocks 🥸 🤣 ).

    Now if only Block FP16 were as exciting as the French movie District BF13. 🤡

    (* after reading your other post in the other thread, I think I added too many unnecessary analogies and aphorisms, when you likely would've been fine with just half the words in the second paragraph. THG has definitely added more depth in the forums since I left over a decade ago. Wish there were more deep-dive folks then. Now... to try and curb the dad humour.... must resist. 🥸 😉 )
    Reply