Introduction
ASRock announced its exclusive mini-ITX coverage for the LGA 2011-v3 platform with much praise and panning from the enthusiast community, a large portion of which didn’t see the point of pairing a 40-lane (or 28-lane) PCIe 3.0 controller with a single expansion slot. Among those who understood its usefulness, there were still those who felt that two memory slots might be a little too limiting for the CPU’s quad-channel controller. But if we look at this another way, we see an LGA 1150 alternative with up to twice as many active cores. And that can only be a good thing, right?
A quick look at the overall picture shows a board with all the high-end mini-ITX prerequisites, from dual gigabit Ethernet controllers to a true dual-band 802.11ac (867 Mb/s) controller with integrated Bluetooth, which we as PC enthusiasts know is far more than an interface for your hands-free kit. It even has an eSATA port. But what’s with the two teal USB ports? ASRock found a use for a couple of the chipset’s spare PCIe 2.0 lanes, adding ASMedia's ASM1142 USB 3.1 controller. Two more lanes connect the PCIe portion of the SATA Express connector, leaving a few lanes untapped to reduce DMI bandwidth.
The CPU’s leftover PCIe 3.0 lanes aren’t completely wasted either, as the X99E-ITX/ac connects four of them to an M.2 slot. The trip gets a little stranger at this point because, according to Device Manager in Windows, the secondary network controller is connected to the CPU’s PCIe 3.0 pathway. We’ve heard that Haswell-E processors can support up to five devices, and connecting this to the CPU does free up some of the chipset’s DMI bandwidth, even though the network controller doesn’t benefit from PCIe 3.0.
Before we dig any deeper into the details, here’s how the X99E-ITX/ac compares to the microATX motherboards we’ve reviewed:
True. However, that section is pointless as it has no direct rivals - I think they're using a standard template and they had to fill something in there.
So if somebody that doesn't need all the PCIE lanes or memory lanes but just the pure power of a hexa/octo core CPU in a small package, then this is the best solution.