Page 1:IDF Spring 2006: The Core Of Intel 3.0
Page 2:Intel's Energy Awakening
Page 3:Quad Cores In Multi-Chip Packages By 2007
Page 4:Core To The Rescue
Page 5:Wide Dynamic Execution
Page 6:Advanced Digital Media Boost
Page 7:Advanced Smart Cache
Page 8:Smart Memory Access
Page 9:Memory Disambiguation
Page 10:Intelligent Power Capability
Page 11:The Memory Controller Question
Page 12:There Is More To Save
Page 13:The Server Challenge
Page 14:Mashups To Drive Mobility
Page 15:Robson NAND Flash Or Hybrid Hard Drives?
Advanced Digital Media Boost
The ALU typically breaks instructions into two blocks, which results in two micro ops and thus two execution clock cycles. Intel now extended the execution width of the three ALUs and the load/store units to 128 bits, allowing for eight single precision or four double precision blocks to be processed per cycle. The feature is called Advanced Digital Media Boost, because it also applies to SSE instructions. This is called Single Cycle SSE and, for example, allows for merging four 32-bit element vectors into one 128-bit element.
Intel expects this to make a tremendous difference for all types of media processing applications (encoding, transcoding, compressing, etc.) and it even says the Core offers the highest IA computation density for vector processing.
- IDF Spring 2006: The Core Of Intel 3.0
- Intel's Energy Awakening
- Quad Cores In Multi-Chip Packages By 2007
- Core To The Rescue
- Wide Dynamic Execution
- Advanced Digital Media Boost
- Advanced Smart Cache
- Smart Memory Access
- Memory Disambiguation
- Intelligent Power Capability
- The Memory Controller Question
- There Is More To Save
- The Server Challenge
- Mashups To Drive Mobility
- Robson NAND Flash Or Hybrid Hard Drives?