Benchmark Results: CrystalDiskMark Streaming Performance
While not exact, CrystalDiskMark’s sequential read test comes close to confirming the results we got in Iometer using random data, going so far as to give the 25 nm NAND-based drive a small throughput advantage.
This very quickly evaporates when we start writing uncompressible random data to the two drives. And that, in a very easy-to-understand chart, is what the performance debate revolves around.
When it comes to optimization, SandForce’s architecture handles easily-compressible data best—we know this. On the previous page, you saw Iometer demonstrating even sequential read and write performance. That’s because our Iometer test isn’t using random data. It’s easily compressible. And from that angle, the 25 nm-based drives are exactly the same as their predecessors.
Present the drive with information that isn’t compressible and you end up with the chart above, though. OCZ’s contention is that this isn’t a representation of real-world data patterns. And while it’s easy enough to isolate one specific deficiency, translating to someone’s actual desktop shouldn’t impact actual performance. Keep this in mind once we hit the PCMark Vantage tests. OCZ isn't just trying to cover its butt here; there is some truth to its point.
Personally, I’d counter that this argument is a lot easier to make if we’re talking about dissimilar SKUs or generations of products. In the context of the OCZSSD2-2VTXE120G, a customer shouldn’t see that degree of performance variance between boxes taken off the shelf, even if the example is isolated.
Depending on supply of 34 nm NAND, that's probably not a sustainable position to take. IMFT isn't going to decide to shift back to 34 nm.
At the risk of contradicting myself, Intel will be using 34 nm NAND on its next-gen 6 Gb/s Elmcrest drives. It's not like the flash isn't disappearing entirely, but the vendors making the switch seem to be motivated largely by cost-cutting reasons.
And then again why not update the 25nm to 1.29 too?
But I guess consistency is not always wished when trying to demonstrate something
-Devin
when you throw a shoes to bush again meaby lol
The real reason is that going to cheaper flash with a 3000 cycle life to reduce the total cost of production (and therefore increase profit) means ... increasing the amount of redundant memory to replace the flash that dies due to wear ... and that process means better error correction is required to achieve that ... therefore performance is effected.
Chris ... I got it into one sentence ... albeit a horrible one.
Nice article mate.