Kioxia and Western Digital have revealed their jointly developed 8th Generation BiCS 3D NAND memory device featuring 218 active layers. The new IC boasts a record-breaking 3200 MT/s interface speed that will allow developers to build high-performance storage subsystems (such as the industry's fastest client SSDs) using fewer 3D NAND chips. To enable a 3200 MT/s I/O, the two companies took a page from YMTC's Xtacking book.
The first 8th Generation BiCS 3D TLC NAND device introduced this week features a 1Tb (128GB) capacity, a four-plane architecture to maximize internal parallelism and performance, and a 3200 MT/s interface speed (which will provide a peak sequential read/write speed of 400 MB/s). Kioxia and Western Digital are the first 3D NAND makers in the world to unveil a flash memory IC with a 3200 MT/s I/O, leapfrogging competitors by 33%.
But while building the world's fastest 3D NAND memory device is an achievement by itself, it is interesting how the two companies achieved this. Kioxia's and Western Digital's 8th Generation BiCS 3D NAND memory features an innovative architecture called CBA (CMOS directly Bonded to Array), which resembles YMTC's recognized Xtacking.
Normally, 3D NAND cells array resides next to or on top of its peripheral circuits like page buffers, sense amplifiers, charge pumps, and I/O. Meanwhile, from semiconductor manufacturing perspective, it is not exactly efficient to make memory and peripheral logic using the same fabrication technology. The CBA and Xtacking architectures involve production of 3D NAND cell array and I/O CMOS on separate wafers using optimal production nodes, something that allows it to maximize bit density of the memory array and I/O performance.
